VeriSilicon Introduces GLTiny™ 3D GPU Programming Model for Ultra-Low-Power, Memory-Efficient Wearable Devices
Optimized GLTiny Model Brings Rich 3D Graphics to Resource-Constrained Wearable Devices Powered by OpenGL ES GPUs
VeriSilicon SMIC 0.13¦Ìm 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing Int…
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| SMIC | 130nm | G | — |
VeriSilicon SMIC 0.13¦Ìm 1.2V/2.5V DUPIO_01 Library is a Analog IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for smic.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Analog IP.
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.