iv-tec is providing video processing IP for high resolution imaging (HD) suitable for either FPGA or ASIC.
All IP is written in verilog and verified on FPGA prototyping platforms.
IP can also be delivered in VHDL by translation.
Stereo 3D depth value Correspondenc calculation with 64 disparities
iv-corr implements a 1-dimensional search algorithm for stereo correspondences in stereo pictures.
Real Time Image Rectification for HD pictures up to 1920x1080p60Hz
The IV-Rect IP implements picture rectification for high resolution images like HD (1280x720p60 or 1920x1080p30).
Real Time Video Image rotation HD up to 1920x1080p60Hz
The IV-ROT IP implements a full rotation (0-360°) algorithm for high resolution images like HD (1920x1080p30/ 1920x1080p60).