Vendor: iv-tec GmbH Category: Video Processing

Stereo 3D depth value Correspondenc calculation with 64 disparities

iv-corr implements a 1-dimensional search algorithm for stereo correspondences in stereo pictures.

Contact Provider Request Datasheet

Overview

iv-corr implements a 1-dimensional search
algorithm for stereo correspondences in
stereo pictures.
The algorithms performs a pixel by pixel
measurement of the horizontal correlation
between pixels in a left and right image. The
IP outputs the disparity of the closest match
(0-63) and its matching value (actual
minimum) for use in subsequent post
processing.
iv-corr operates on pixelrates up to
75Mpixel/sec and with a maximum line size
of 1536 pixels.
Programmable Parameters are:
input picture size

Key features

  • Stereo Correspondence Calculation
  • 64 Disparities
  • 75MSampes/sec
  • 1 Depth Value per cycle
  • Block based matching algorithm

Benefits

  • Real time disparity calculation based on simple block matching algorithm

What’s Included?

  • Verilog 2001 compatible code
  • Customized for your application
  • Integrated to your existing code
  • Easily interfaced to standard I/O standards
  • Excellent code and expression coverage
  • FPGA proven design
  • Real time demos available
  • Application support available
  • HDL Source Licenses
    • Synthesizable Verilog 2001 RTL* (VHDL option available)
    • Self checking Verilog Testbench **
    • VCD dump option
    • Expected results generator
    • Simulation script
    • Test stimuli vectors
    • Test config vectors
    • Generic API optional available
    • Coverage reports
    • Synthesis script
    • IP Documentation
  • Netlist Licenses
    • For FPGA platforms: XILINX, Lattice, Altera
    • For ASIC: please ask

Specifications

Identity

Part Number
iv-corr
Vendor
iv-tec GmbH
Type
Silicon IP

Videos

Video 1

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

iv-tec GmbH
HQ: Germany
Contact iv-tec GmbH

Learn more about Video Processing IP core

Picking the right MPSoC-based video architecture: Part 1

A look at the design of multiprocessor systems-on-chips (MPSoCs) for video applications and how to optimize them for computational power and real-time performance as well as flexibility. Part 1: Architectural approaches to video processing

Analysis: ARC's Configurable Video Subsystems

Adding to its growing portfolio of licensable silicon IP subsystems, ARC has announced five configurable video processing subsystems. The subsystems range from the smallest-size AV 402V to the highest-performance AV 417V, and support multi-standard video encoding and decoding at resolutions ranging from CIF to D1.

Frequently asked questions about Video Processing IP

What is Stereo 3D depth value Correspondenc calculation with 64 disparities?

Stereo 3D depth value Correspondenc calculation with 64 disparities is a Video Processing IP core from iv-tec GmbH listed on Semi IP Hub.

How should engineers evaluate this Video Processing?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Video Processing IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP