Faraday Technology IP Cores

USB 2.0 On-The-Go PHY, UMC 0.11um HS/FSG Logic process.

• USB 2.0
• UMC
• 110nm
• HS

USB 2.0 OTG PHY, UMC 0.11um HS AL Logic process.

• USB 2.0
• UMC
• 110nm
• HS

USB 2.0 OTG PHY, UMC 0.11um HS/AE (AL Advance Enhancement) Logic process.

• USB 2.0
• UMC
• 110nm
• HS

USB1.1 PHY feature USB 1.1 Type PHY, Technology Type process USB 1.1 On-The-Go PHY, UMC 90nm LL Logic process.

• UCIe 1.1
• UMC
• 90nm
• LL

USB 1.1 OTG PHY, UMC 65nm LL Logic/RVT Low-K process.

• UCIe 1.1
• UMC
• 65nm
• LL

ID Detector for USB OTG Function, UMC 65nm SP/HVT Low-K Logic process.

• UCIe 1.1
• UMC
• 65nm

USB 1.1 PHY, UMC 0.18um e-flash process.

• UCIe 1.1
• UMC
• 180nm

USB 1.1 OTG, UMC 0.18um e-flash process.

• UCIe 1.1
• UMC
• 180nm

USB1.1 PHY feature USB 1.1 Type PHY, Technology Type process USB 1.1 On-The-Go PHY, UMC 0.11um HS/Copper Logic process.

• UCIe 1.1
• UMC
• 110nm
• HS

Serial ATA I II PHY, UMC 90nm SP/RVT Low-K Logic process.

• UMC
• 90nm
• SP

Over sampling 1 port 3G/1.5G SATA PHY, UMC 0.13um HS+LL/FSG Logic process.

• UMC
• 130nm
• HS

3G/1.5G Serial ATA PHY, UMC 0.11um HS/AE (AL Advance Enhancement) Logic process.

• UMC
• 110nm
• HS

4x lane PCI Express Gen II PHY, UMC 90nm SP/RVT Low-K Logic process.

• PCIe Gen2
• UMC
• 90nm
• SP

PCI-Express II PHY, UMC 90nm SP/RVT Low-K process.

• PCIe Gen2
• UMC
• 90nm
• SP

PCIE Gen.II, UMC 55nm SP/RVT Low-K Logic process.

• PCIe Gen2
• UMC
• 55nm
• SP

PCI-Express PHY with PIPE interface, 1 lane PCI-E PHY, UMC 0.18um GII Logic (RVT) process.

• PCIe Gen1
• UMC
• 180nm
• G

PCI-Express PHY with PIPE interface, 1 lane PCI-E PHY, UMC 0.18um GII Logic (RVT) process.

• PCIe Gen1
• UMC
• 180nm
• G

UMC 90nm LL/RVT Synchronous high density Two Port Register File memory compiler.

• UMC
• 90nm
• LL

UMC 65nm LL/RVT Low-K Logic process synchronous high density Two Port Register File SRAM memory compiler.

• UMC
• 65nm
• LL

UMC 0.65um SP/RVT Low-K Logic process synchronous Two Port Register File memory compiler.

• UMC
• 65nm