Standard Cell (MiniLib) Library IP, 6 tracks, UMC 0.11um eFlash/HS process
UMC 0.11um eFlash/EE2PROM AL process Mini-Library+ (6-Track) Library.
- UMC
- 110nm
Faraday Technology Corporation is a leading fabless ASIC and silicon IP provider. The company's broad silicon IP portfolio includes I/O, Cell Library, Memory Compiler, ARM-compliant CPUs, DDRI/II/III, MPEG4, H.264, USB 2.0/3.0, 10/100 Ethernet, Serial ATA, and PCI Express, etc. Headquartered in Taiwan, Faraday has service and support offices around the world, including the U.S., Japan, Europe, and China. Faraday is listed in Taipei Stock Exchange, ticker 3035.
Standard Cell (MiniLib) Library IP, 6 tracks, UMC 0.11um eFlash/HS process
UMC 0.11um eFlash/EE2PROM AL process Mini-Library+ (6-Track) Library.
Standard Cell (MiniLib) Library IP, 7 tracks, UMC 0.18um LL process
UMC 0.18um MM/RF process Mini Cell Library.
Standard Cell (MiniLib) Library IP, 7 tracks, UMC 0.18um LL process
UMC 0.18um MM/RF process Mini Cell Library.
Standard Cell (MiniLib) Library IP, 7 tracks, UMC 0.18um G2 process
UMC 0.18um GII Logic process high-density/Low Power Core Cell Library.
Standard Cell (MiniLib) Library IP, 6 tracks, UMC 0.13um LL/FSG process
UMC 0.13um LL/FSG Logic process Mini-Library+.
Standard Cell (High Voltage) Library IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG process 3.3V Device Core Cell Library for RTC/PMU usage.
Standard Cell (High Voltage) Library IP, 9 tracks, UMC 0.13um eHV process
UMC 0.13um Embedded High Voltage 1.5V Core Cell Library.
Standard Cell (Generic) Library IP, RVT, 8 tracks, UMC 55nm LP process
UMC 55nm LP/RVT Low-K Logic process 8-Track Generic Core Cell Library.
Standard Cell (Generic) Library IP, LVT, 8 tracks, UMC 55nm LP process
UMC 55nm LP/LVT Low-K Logic process 8-Track Generic Core Cell Library.
Standard Cell (Generic) Library IP, HVT, 8 tracks, UMC 55nm LP process
UMC 55nm LP/HVT Low-K Logic process 8-Track Generic Core Cell Library.
Standard Cell (Generic) Library IP, RVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Logic process 12-Track high speed Generic Core Cell Library (C50).
Standard Cell (Generic) Library IP, RVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Logic process 12-Track high speed Generic Core Cell Library (C40).
Standard Cell (Generic) Library IP, LVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Logic process 12-Track high speed Generic Core Cell Library (C50).
Standard Cell (Generic) Library IP, LVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Logic process 12-Track high speed Standard Core Cell Library.
Standard Cell (Generic) Library IP, HVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Logic process 12-Track high speed Generic Core Cell Library (C50).
Standard Cell (Generic) Library IP, HVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Logic process 12-Track high speed Generic Core Cell Library (C40).
Standard Cell (Generic) Library IP, RVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Logic process 9-Track Standard Cell Library (C50 Generic Core).
Standard Cell (Generic) Library IP, RVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Logic process 9-Track Standard Cell Library (Generic Core).
Standard Cell (Generic) Library IP, LVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Logic process 9-Track Standard Cell Library (C50 Generic Core).
Standard Cell (Generic) Library IP, LVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Logic process 9-Track Standard Generic Core Cell Library.