Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 40nm LP process
Faraday Technology
•
HQ:
Taiwan
UMC 40nm LP/HVT Low-K Logic process 7-Track POWERSLASH Cell Library.
- UMC
- 40nm
- LP
Compare 2,534 Faraday Technology IP Cores from 1 vendors
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Standard Cell PowerSlash(TM) Library IP, RVT, 9 tracks, UMC 40nm LP process
Faraday Technology• HQ: TaiwanUMC 40nm LP/RVT Logic process 9-Track Standard Cell Library (POWERSLASH Core).
- UMC
- 40nm
- LP
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Standard Cell PowerSlash(TM) Library IP, LVT, 9 tracks, UMC 40nm LP process
Faraday Technology• HQ: TaiwanUMC 40nm LP/LVT Logic process 9-Track Standard Cell Library (POWERSLASH Core).
- UMC
- 40nm
- LP
-
Standard Cell PowerSlash(TM) Library IP, HVT, 9 tracks, UMC 40nm LP process
Faraday Technology• HQ: TaiwanUMC 40nm LP/HVT Logic process 9-Track Standard Cell Library (POWERSLASH Core).
- UMC
- 40nm
- LP
-
Standard Cell PowerSlash(TM) Library IP, RVT, 12 tracks, UMC 28nm HLP process
Faraday Technology• HQ: TaiwanUMC 28nm Logic and Mixed-Mode HLP/RVT process 12-Track Standard POWERSLASH Core Cell Library (C35).
- UMC
- 28nm
- HLP
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Standard Cell PowerSlash(TM) Library IP, LVT, 12 tracks, UMC 28nm HLP process
Faraday Technology• HQ: TaiwanUMC 28nm Logic and Mixed-Mode HLP/LVT process 12-Track POWERSLASH Cell Library (C35).
- UMC
- 28nm
- HLP
-
Standard Cell PowerSlash(TM) Library IP, HVT, 12 tracks, UMC 28nm HLP process
Faraday Technology• HQ: TaiwanUMC 28nm Logic and Mixed-Mode HLP/HVT process 12-Track POWERSLASH Cell Library (C35).
- UMC
- 28nm
- HLP
-
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 28nm HLP process
Faraday Technology• HQ: TaiwanUMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library.
- UMC
- 28nm
- HLP
-
Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 28nm HLP process
Faraday Technology• HQ: TaiwanUMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library.
- UMC
- 28nm
- HLP
-
Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 28nm HLP process
Faraday Technology• HQ: TaiwanUMC 28nm HLP/HVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library.
- UMC
- 28nm
- HLP
-
Standard Cell PowerSlash(TM) Library IP, RVT, 9 tracks, UMC 28nm HLP process
Faraday Technology• HQ: TaiwanUMC 28nm Logic and Mixed-Mode HLP/RVT process 9-Track POWERSLASH Cell Library (C35).
- UMC
- 28nm
- HLP
-
Standard Cell PowerSlash(TM) Library IP, UMC 0.13um LL/FSG process
Faraday Technology• HQ: TaiwanUMC 0.13um LL FSG Logic process high density POWERSLASH Core Cell Library.
- UMC
- 130nm
- LL
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Standard Cell PowerSlash(TM) Library IP, UMC 0.13um HS/FSG process
Faraday Technology• HQ: TaiwanUMC 0.13um HS/FSG process FSC0H_J POWERSLASHKit core Library.
- UMC
- 130nm
- HS
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Standard Cell PowerSlash(TM) Library IP, UMC 0.13um SP/FSG process
Faraday Technology• HQ: TaiwanUMC 0.13um SP FSG Logic process high density POWERSLASH Core Cell Library.
- UMC
- 130nm
- SP
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Standard Cell PowerSlash(TM) Library IP, 8 tracks, UMC 0.11um eFlash/LL process
Faraday Technology• HQ: TaiwanUMC 0.11um eFlash/LL process 8-Track Cell Library.
- UMC
- 110nm
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Standard Cell PowerSlash(TM) Library IP, UMC 0.11um LL/FSG process
Faraday Technology• HQ: TaiwanUMC 0.11um LL/FSG Logic process high density POWERSLASH Core Cell Library.
- UMC
- 110nm
- LL
-
Standard Cell PowerSlash(TM) Library IP, 7 tracks, UMC 0.11um HS/FSG process
Faraday Technology• HQ: TaiwanUMC 0.11um HS/FSG Logic process high density POWERSLASH (POWERSLASH) Core Cell Library.
- UMC
- 110nm
- HS
-
Standard Cell PowerSlash(TM) Library IP, 8 tracks, UMC 0.11um eFlash/HS process
Faraday Technology• HQ: TaiwanUMC 0.11um eFlash/HS process 8-Track Generic Core Cell Library.
- UMC
- 110nm
-
Standard Cell (Ultra High Speed) Library IP, RVT, 12 tracks, UMC 55nm LP process
Faraday Technology• HQ: TaiwanUMC 55nm LP/RVT Low-K Logic process 12-Track Generic Core Cell Library.
- UMC
- 55nm
- LP
-
Standard Cell (Ultra High Speed) Library IP, LVT, 12 tracks, UMC 55nm LP process
Faraday Technology• HQ: TaiwanUMC 55nm LP/LVT Low-K Logic process 12-Track Generic Core Cell Library.
- UMC
- 55nm
- LP