Faraday Technology Corporation is a leading fabless ASIC and silicon IP provider. The company's broad silicon IP portfolio includes I/O, Cell Library, Memory Compiler, ARM-compliant CPUs, DDRI/II/III, MPEG4, H.264, USB 2.0/3.0, 10/100 Ethernet, Serial ATA, and PCI Express, etc. Headquartered in Taiwan, Faraday has service and support offices around the world, including the U.S., Japan, Europe, and China. Faraday is listed in Taipei Stock Exchange, ticker 3035.
PLL (Frequency Synthesizer) IP, Input: 1MHz - 200MHz, Output: 25MHz - 380MHz, UMC 0.18um G2 process
Input 1M-200MHz, output 25M-380MHz, frequency synthesizable PLL, UMC 0.18um GII Logic process.
PLL (Frequency Synthesizer) IP, Input: 12MHz, Output: 120MHz / 540MHz, UMC 40nm LP process
Input 12MHz, output clock1 540MHz and output clock2 120MHz, PLL, UMC 40nm LP/RVT Low-K Logic process.
PLL (Frequency Synthesizer) IP, Input: 12MHz - 200MHz, Output: 250MHz - 500MHz, UMC 90nm SP process
Input 12M-200MHz, output 250M-500MHz, frequency synthesizable PLL, UMC 90nm SP Logic process.
PLL (Frequency Synthesizer) IP, Input: 12MHz - 200MHz, Output: 250MHz - 500MHz, UMC 40nm LP process
miniPLL (TM) Phase-Locked Loop (PLL) with an operating frequency range of between 250MHz and 500MHz, UMC 40nm LP/RVT Logic proces…
Input 12M-200MHz, output 250M-500MHz, frequency synthesizable PLL, UMC 0.13um Logic HS process.
PLL (Frequency Synthesizer) IP, Input: 10MHz - 200MHz, Output: 62.5MHz - 1GHz, UMC 40nm LP process
Input 10M-200MHz, output 62.5M-1GHz, frequency synthesizable PLL, UMC 40 nm LP/RVT Low-K Logic process.
PLL (Frequency Synthesizer) IP, Input: 10MHz - 200MHz, Output: 62.5MHz - 1GHz, UMC 40nm LP process
Input 10M-200MHz, output 62.5M-1GHz, frequency synthesizable PLL, UMC 40 nm LP/RVT Low-K Logic process.
PLL (Frequency Synthesizer) IP, Input: 10MHz - 200MHz, Output: 300MHz - 600MHz, UMC 90nm SP process
Input 10M-200MHz, output 300M-600MHz, frequency synthesizable PLL, UMC 90nm SP/RVT Low-K Logic process.
PLL (Frequency Synthesizer) IP, Input: 10MHz - 200MHz, Output: 20MHz - 300MHz, UMC 0.18um G2 process
Input 10M-200MHz, output 20M-300MHz, frequency synthesizable PLL, UMC 0.18um GII Logic process.
PLL IP, Input: 25MHz, Output: 156.25MHz, UMC 40nm LP process
Jitter clean integer-N LC-PLL for serdes, output frequency is 156.25M, input frequency is 25M for Low-Jitter Mode, 156.25M for Ji…
Oscillator IP, Output: 5KHz, UMC 55nm SP process
Output frequency 5KHz.
One Port Register File Compiler IP, UMC 90nm SP process
UMC 90nm SP/RVT low_K Logic process synchronous One Port Register File.
One Port Register File Compiler IP, UMC 90nm SP process
UMC 90nm Logic standard performance process synchronous high density Single Port Register File SRAM memory compiler.
One Port Register File Compiler IP, UMC 55nm eFlash process
UMC 55nm eFlash One Port Register File with Power Gating.
One Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP One Port Register File with Sleep/Retention/Nap mode & peripheral LVT feature.
One Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP One Port Register File with Sleep/retention/Nap mode feature.
One Port Register File Compiler IP, UMC 28nm SP process
UMC 28nm Logic process synchronous Ultra high speed Single Port Register File SRAM memory compiler.
One Port Register File Compiler IP, UMC 28nm HLP process
UMC 28nm HLP Logic process One Port Register File with LVT.
One Port Register File Compiler IP, UMC 28nm HLP process
UMC 28nm HLP/ Low-K One Port Register File.
One Port Register File Compiler IP, UMC 28nm HLP process
UMC 28nm HLP/UHS One Port Register File compiler with peripheral LVT.