AXI system Peripheral IP, Interrupt Controller, Soft IP
Generic Interrupt Controller with AXI interface.
- Interrupt Controller
Faraday Technology Corporation is a leading fabless ASIC and silicon IP provider. The company's broad silicon IP portfolio includes I/O, Cell Library, Memory Compiler, ARM-compliant CPUs, DDRI/II/III, MPEG4, H.264, USB 2.0/3.0, 10/100 Ethernet, Serial ATA, and PCI Express, etc. Headquartered in Taiwan, Faraday has service and support offices around the world, including the U.S., Japan, Europe, and China. Faraday is listed in Taipei Stock Exchange, ticker 3035.
AXI system Peripheral IP, Interrupt Controller, Soft IP
Generic Interrupt Controller with AXI interface.
AXI system Peripheral IP, AXI to AXI Bridge, Soft IP
AMBA AXI to AXI Bridge.
AHB system Peripheral IP, AHB - to - AXI Bridge, Soft IP
AMBA AXI to AHB Bridge.
AHB system Peripheral IP, Interrupt controller, Soft IP
Interrupt controller with AHB interface.
AHB system Peripheral IP, AHB - to - AXI Bridge, Soft IP
AHB to AXI bridge.
DMA controller with AXI interface.
AHB system Peripheral IP, AHB - to - AHB Bridge, Soft IP
AHB to AHB bridge.
Two Port Register File Compiler IP, UMC 0.162um Logic process
UMC 0.162um Logic process synchronous Two Port Register File SRAM memory compiler.
Two Port Register File Compiler IP, UMC 0.153um MS process
UMC 0.153um Mixed-Mode/Logic process synchronous Two Port (1R1W) Register File SRAM memory compiler.
One Port Register File Compiler IP, UMC 0.162um G2 process
UMC 0.162um GII Logic process synchronous high density Single Port Register File SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.153um MS process
UMC 0.153um Mixed-Mode/Logic process high density, Low Power mini Single Port SRAM.
One Port Register File Compiler IP, UMC 0.153um MS process
UMC 0.153um Mixed-Mode/Logic process synchronous high density Single Port Register File SRAM memory compiler.
ROM Compiler IP, UMC 0.162um eHV process
UMC 0.162um eHV process synchronous 1P2M Metal ROM memory compiler.
ROM Compiler IP, UMC 0.153um MS process
UMC 153nm Mixed-Mode/Logic process synchronous Via1 ROM memory compiler.
Dual Port SRAM Compiler IP, UMC 0.153um MS process
UMC 153nm Mixed-Mode/Logic process synchronous high density Dual Port SRAM memory compiler.
SRAM/ROM Controller IP, SRAM/ROM Controller, Soft IP
Static memory controller with AXI interface.
SD host controller wih ahb interface, compliant with the SD Host Controller Standard Specification Version 3.00.
PCIe Controller IP, PCIe Gen-2 with the AXI interface, x4 Lanes, Soft IP
PCIe Gen2 x4 Lane Endpoint Controller.
Memory Controller IP, NAND Flash memory Host controller, Soft IP
NAND flash host controller with AHB interface, it supports SLC and MLC NAND flash.
AXI system Peripheral IP, AXI/APB host bridge, Soft IP
AXI/APB host bridge controller.