Faraday Technology IP Cores

UMC 0.162um eFlash process Generic Cell Library.

• Standard Cell Libraries

UMC 0.153um 3.3V IO Mixed-Mode/Logic process True 3.3V IO Cell Library (blown up version of 0.18um IO ).

• GPIO

UMC 0.153um Mixed-Mode/Logic 3.3V IO Logic process 5V Tolerant Standard IO Cell Library (blown up version of 0.18um IO).

• GPIO

MIPI Transmitter Controller.

• MIPI

MIPI DSI Peripheral Controller.

• MIPI

DSI Host Controller.

• MIPI

MIPI CSI Receiver Controller.

• MIPI

WatchDog timer with APB interface.

• Timers & Watchdogs

Input 1.8V-3.6V, VBG=0.615V, Band Gap, UMC 0.162um HV-DDD process.

• Voltage Reference

Input 1.2V-1.98V, VBG=0.615V bandgap, UMC 0.153um Logic process.

• Voltage Reference

3.3V to 1.8V with 120mA driving capability, VBG=0.615V, Linear Regulator, UMC 0.153um Logic process.

• LDO Voltage Regulator

Power on reset(POR) block, UMC 0.162um eHV process.

• Power On Reset (POR)

Vrr=1.2V Vfr=1.0V, input 1.8V, Core type (with Self-Test Circuit), Power On Reset, UMC 0.153um Mixed-Mode/Logic process.

• Power On Reset (POR)

Internal-RC, frequency 50MHz.

• Oscillator

Internal-RC, frequency 10MHz.

• Oscillator

10-Bit 1MHz Voltage Output R-2R Digital-to-Analog converter, UMC 0.153um Logic process.

• 10 Bit

24-Bit 96KHz Analog-to-Digital converter, 3.3V 3-channel Sigma-Delta Audio Analog-to-Digital converter, HJ 0.18um eFlash process.

• 24 Bit

USB OTG 2.0 PHY, UMC 0.153um Logic process.

• USB 2.0

Flash Controller with SPI Interface.

• SPI / QSPI XSPI

L2 cache controller with AXI interface.

• Bus Fabric