Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: Multi-Protocol PHY

USB 3.0 and PCIe 2.0 Combo PHY

The USB 3.0 SuperSpeed and PCI Express Combo PHY is a programmable IP compatible with the PHY Interface for the PCI Express Archi…

Overview

The USB 3.0 SuperSpeed and PCI Express Combo PHY is a programmable IP compatible with the PHY Interface for the PCI Express Architecture and USB 3.0 SuperSpeed Architecture specifications. The PHY supports the USB 3.0 SuperSpeed (5 Gbps) and PCI Express Gen1 (2.5 Gbps) and Gen2 (5.0 Gbps).

Key features

  • Fully compatible with:
    • USB 3.0 SuperSpeed: Universal Serial Bus 3.0 Specification, Revision 1.0
    • PCI Express: PCI Express Base Specification, Revision 2.0
  • Supports all USB 3.0 and PCIe 2.0 power management modes
  • Supports PCIe L1 PM substates (L1.1 and L1.2) with CLKREQ#
  • Spread spectrum clock (SSC) and data scrambling to minimize EMI
  • Supports 16-bit 250 MHz and 32-bit 125 MHz PIPE interfaces for USB 3.0/PCIe Gen2
  • Supports 16-bit 125 MHz and 32-bit 62.5 MHz PIPE interfaces for PCIe Gen1
  • Supports a wide range of reference clocks: 25/50/60/100 MHz
  • Multiple loopback and compliance test modes
  • Built-in BIST pattern generator and checker with programmable modes for stand-alone tests
  • On-chip Eye Opening Monitor (EOM) to measure the eye diagram at the RX side
  • -3.5 dB/-6 dB de-emphasis at the TX side and programmable CTLE equalization at the RX side
  • Supports programmable transmit swing:
    • 8b /10b encoding and decoding implemented in hardware
    • Supports LFPS generation and detection in USB 3.0 mode and beacon in PCIe mode
  • IEEE standards 1149.1 and 1149.6 (JTAG) boundary scan for internal visibility and control
  • APB and I2C interfaces to access the internal registers for different applications

Block Diagram

Specifications

Identity

Part Number
USB 3.0/PCIe 2.0 PHY
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP
Controller / PHY
PHY

Files

Note: some files may require an NDA depending on provider policy.

Provider

VeriSilicon Microelectronics (Shanghai) Co., Ltd.
HQ: USA
VeriSilicon Microelectronics (Shanghai) Co., Ltd. (VeriSilicon, 688521.SH) is a leading public company that provides custom silicon solutions, leveraging its comprehensive and proprietary portfolio of semiconductor IPs. VeriSilicon possesses six categories of in-house processing IPs, namely Graphics Processing Unit (GPU) IP, Neural Network Processing Unit (NPU) IP, Video Processing Unit (VPU) IP, Digital Signal Processing (DSP) IP, Image Signal Processing (ISP) IP, and Display Processing IP, as well as more than 1,700 analog and mixed-signal IPs, RF IPs, and interface IPs. Leveraging its own IPs, VeriSilicon has developed a wealth of software and hardware custom chip design platforms targeting Artificial Intelligence (AI) applications, covering always-on ultralight spatial computing devices such as smartwatches and AI/AR glasses, high-efficiency edge computing devices such as AI PCs, AI phones, smart cars, and robots, as well as high-performance cloud computing devices like data centers and servers. In response to the trend of System-on-Chip (SoC) evolving towards System-in-Package (SiP) driven by the demand for large computing power, VeriSilicon put forward the concepts of "IP as a Chiplet”, "Chiplet as a Platform", and "Platform as an Ecosystem”. The company keeps advancing the R&D and industrialization of its Chiplet technologies and projects from the perspective of interface IP, Chiplet architecture, advanced packaging technology, and others for AI-Generated Content (AIGC) and autonomous driving solutions. Under its unique “Silicon Platform as a Service” (SiPaaS) business model, VeriSilicon serves a broad range of market segments, including consumer electronics, automotive electronics, computer and peripheral, industrial, data processing, Internet of Things (IoT), among others. Its main customers include fabless, IDM, system vendors (OEM/ODM), large internet companies, and cloud service providers. Founded in 2001 and headquartered in Shanghai, China, VeriSilicon has 9 design and R&D centers, along with 11 sales and customer service offices worldwide. VeriSilicon currently has more than 2,000 employees.

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Frequently asked questions about Multi-Protocol PHY IP cores

What is USB 3.0 and PCIe 2.0 Combo PHY?

USB 3.0 and PCIe 2.0 Combo PHY is a Multi-Protocol PHY IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub.

How should engineers evaluate this Multi-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Multi-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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