A design path to success exists for ultra-low-voltage SoCs
The alien realm of ultra-low voltage (ULV) in chip design means supply voltages near or below transistor threshold voltages.
Vendor:
Faraday Technology
Category:
Standard Cell Libraries
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track Powerslash Cell Library (C60) w/ Forward Bias. W/ deep Nwell.
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track Powerslash Cell Library (C60) w/ Forward Bias.
Overview
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track Powerslash Cell Library (C60) w/ Forward Bias. W/ deep Nwell.
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| UMC | 55nm | ULP | Silicon Proven |
Specifications
Identity
Part Number
FSF0U_DHS_POWERSLASH_CORE
Vendor
Faraday Technology
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Taiwan
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Frequently asked questions about standard cell libraries
What is UMC 55nm ULP/HVT Low-K Logic Process Process 8-track Powerslash Cell Library (C60) w/ Forward Bias. W/ deep Nwell.?
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track Powerslash Cell Library (C60) w/ Forward Bias. W/ deep Nwell. is a Standard Cell Libraries IP core from Faraday Technology listed on Semi IP Hub. It is listed with support for umc Silicon Proven.
How should engineers evaluate this Standard Cell Libraries?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Standard Cell Libraries IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.