Vendor: Fraunhofer Institute Integrated Circuits and Systems (IIS) Category: Analog Front End

Ultra-Low-Power 6-13 Bit 0.5-10 KS/s 10μW Analog-Frontend on XFAB XT018

The Analog-Frontend (AFE) IP consists of programmable current and voltage preamplifier followed by a Successive Approximation Reg…

X-FAB 180nm XT018 Available on request View all specifications

Overview

The Analog-Frontend (AFE) IP consists of programmable current and voltage preamplifier followed by a Successive Approximation Register (SAR) architecture ADC using charge-redistribution technique. The ADC IP is configurable regarding resolution (6-13 bit) and sample rate (up to 10kS/s). The preamplifier offers programmable gain from 0.5 to 4. The input voltage range is quasi-rail-to-rail guaranteeing more than +- 1.7 V @ 1.8 V power supply. An optional calibration technique can be applied to compensate degraded mismatch behavior of t echnology capacitors. The overall power consumption of the AFE IP sums up with 10.5 uW at 1 kHz input signal.

The AFE ASIC with current and voltage input channels was applied to commercial environmental sensors for ambient light, temperature and CO gas. An internal temperature monitor is included.

The AFE ASIC as well as the stand-alone SAR ADC are silicon evaluated using the XFAB XT018 process. Measurement results and samples are available.

The AFE IP was migrated to GF 22FDX. Fraunhofer IIS/EAS provides a detailed documentation and support for the IP integration. Modifications, extensions and technology ports of the IP are available on request.

Key features

  • Resolution: 6 - 13 bit
  • Input bandwidth: 31 kHz
  • ENOB: 12.6 bit
  • Power consumption: 10.5 uW @ 1kHz
  • Supply voltage: 1.8 V
  • Operation clock: 140 kHz
  • Differential input: +- 1.7 V
  • Programable Gain: - 6 up to 12 dB
  • Silicon area: 0.16 mm2

Block Diagram

AFE13b010kS180nm block diagram

Benefits

  • Low design risk due to silicon evaluated design
  • Easy to use input due to integrated input buffer
  • Selectable power consumption due to integrated automatic power-down function
  • Task dependent selectable resolution
  • Flexible use due to single-conversion and continous-conversion mode

What’s Included?

  • GDSII data
  • Simulation model
  • Documentation
  • Silicon validation report
  • Integration support

Silicon Options

Foundry Node Process Maturity
X-FAB 180nm XT018 Available on request

Specifications

Identity

Part Number
AFE13b010kS180nm
Vendor
Fraunhofer Institute Integrated Circuits and Systems (IIS)
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

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Frequently asked questions about Analog Front End IP cores

What is Ultra-Low-Power 6-13 Bit 0.5-10 KS/s 10μW Analog-Frontend on XFAB XT018?

Ultra-Low-Power 6-13 Bit 0.5-10 KS/s 10μW Analog-Frontend on XFAB XT018 is a Analog Front End IP core from Fraunhofer Institute Integrated Circuits and Systems (IIS) listed on Semi IP Hub. It is listed with support for x-fab Available on request.

How should engineers evaluate this Analog Front End?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Analog Front End IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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