Vendor: M31 Technology Corp. Category: UFS Controller

UFSHCI 4.0 - UFS Host Controller Interface

The UFS Host Controller Interface (UFSHCI) is a high-performance interface that connects to UniPro and M-PHY IP in mobile platfor…

Overview

The UFS Host Controller Interface (UFSHCI) is a high-performance interface that connects to UniPro and M-PHY IP in mobile platforms. It provides command sets and device management functions for UFS host applications, as well as manages data transfer between the host SW and UFS devices.

The UFSHCI IP is compliant with JEDEC UFSHCI 4.0 specification, which includes the Multi-Circular Queue (MCQ) feature and support for 2DW PRDT to enhance host performance. The UFSHCI IP also provides the AES-128 engine (optional) to meet customers’ security demands.

The UFSHCI IP can be combined with UniPro IP and M-PHY IP to provide a comprehensive UFS host solution, enabling customers to easily integrate it into their applications and accelerate the time-to-market for SoC designs.

Key features

  • Compliant with JEDEC UFSHCI Standard version 4.0 specification
  • Compliant with JEDEC UFS Standard version 4.0 specification
  • Up to 32 doorbells for UTP transfers
  • Up to 32 Multi-Circular Queue (MCQ) UTP transfer requests
  • 4 sets of multi RTTs
  • Out-of-order data transfer
  • 4DW/2DW PRDT formats
  • PRDT caching supports 32 sets of commands
  • DATAIN and RTT UPIU with Hint field
  • Extended initiator ID (EXT_IID)
  • Power domain partitioning for power saving
  • Auto-hibernate
  • Optional Crypto function for data transfer (AES-XTS 128)
  • 128-bit AXI master interface for data transfer
  • AXI burst length of 1 to 16 transfers

Block Diagram

UFSHCI 4.0 - UFS Host Controller Interface block diagram

Specifications

Identity

Part Number
UFSHCI 4.0 - UFS Host Controller Interface
Vendor
M31 Technology Corp.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about UFS Controller IP core

M31 Expands Rambus Collaboration, Strengthening Its One-Stop MIPI Subsystem Solution

This collaboration combines these controller capabilities with M31’s silicon-proven MIPI PHY portfolio with a strong track record of successful deployments, enabling M31 to offer a comprehensive MIPI subsystem solution integrating high-speed MIPI PHYs and MIPI CSI/DSI controllers to address the growing requirements of high-resolution imaging and display applications.

M31 High-Speed and Long-Channel MIPI C/D-PHY Solution on TSMC N3P/N3C

With the rapid growth of AR/VR and high-resolution imaging systems such as drones and action cameras, MIPI CSI (Camera Serial Interface) and MIPI DSI (Display Serial Interface) require both high data throughput and low power consumption. M31 provides a MIPI C-PHY and D-PHY IP combo solution implemented on TSMC N3P and N3C processes.

M31 Gains Momentum in Advanced Processes, Targets Double-Digit Growth in 2026

Consolidated revenue for the first quarter reached NT$395 million, representing a year-over-year decrease of 9.2%. The decline was primarily attributable to timing fluctuations in contract signings for certain key advanced-node customers in North America, with the related revenue expected to be recognized in the second quarter.

Frequently asked questions about UFS Controller IP

What is UFSHCI 4.0 - UFS Host Controller Interface?

UFSHCI 4.0 - UFS Host Controller Interface is a UFS Controller IP core from M31 Technology Corp. listed on Semi IP Hub.

How should engineers evaluate this UFS Controller?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this UFS Controller IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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