Simplifying Multi-Domain Voltage-Control Verification with Synopsys AVSBus 2.0 VIP
Learn how AVSBus 2.0 VIP validates power delivery in AI and data center SoCs.
Vendor:
Synopsys, Inc.
Category:
USB
SuperSpeed USB 3.1 Host Controller Multiport
The vendor provides designers with silicon-proven, configurable USB 3.1 Controllers.
Overview
The vendor provides designers with silicon-proven, configurable USB 3.1 Controllers. The USB 3.1 controllers provide the lowest possible gate count, efficient power management optimized with dual power rails, and PIPE and UTMI/UTMI+ interfaces for PHYs. This comprehensive solution includes support for Dual Role Device (DRD), xHCI Host, and Device.
The USB 3.1 Controller IP offers the flexibility required for high-volume, fast turnaround consumer applications. Configuration options maximize SoC design performance and minimize CPU interrupts, while flexible parameters enable easy integration into low- and high-latency systems.
The USB Controller IP has shipped in almost two billion units for leading electronics companies worldwide. Using the USB IP significantly reduces development time and engineering risk, bringing USB-based SoCs to market faster.
The USB IP is the most certified IP solution in the industry. With over 3,000 design wins, the vendor's complete USB IP solution--consisting of controllers, PHYs, verification IP, drivers, and IP prototypes--enables designers to lower integration risk and speed time-to-market.
Key features
- Supports SuperSpeed USB power savings modes, Uniform Power Format (UPF) and dual power rails
- Configurable data buffering options to optimize performance vs area
- Lowers overall system power by design
- Supports SuperSpeed and High-Speed modes
- Migrate quickly from USB 3.0 to USB 3.1 by using existing USB 3.0 drivers
Block Diagram
dwc_usb_3_1_host_multiport block diagram
Specifications
Identity
Part Number
dwc_usb_3_1_host_multiport
Vendor
Synopsys, Inc.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
Learn more about USB IP core
Synopsys Joins Arm Total Design for Physical AI to Advance Autonomous Systems
Learn how Synopsys and Arm Total Design help accelerate Physical AI systems with pre-validated IP, virtual development, and system-level design.
Synopsys Advances Agentic AI Chip Design with AMD and Microsoft
Introduces Industry's First Autonomous EDA Workflows on Microsoft Discovery to Accelerate Engineering from Specification to Silicon
Synopsys and Intel Foundry Fast-Track Customer Readiness from Silicon to Systems on Intel 14A
Certified AI-powered EDA flows, integrated multiphysics analysis, and broad IP portfolio accelerate Angstrom-scale AI and multi-die designs
Synopsys Showcases Comprehensive Autonomous Engineering Workflows from Silicon to Systems, Developed with NVIDIA Technology
Synopsys unveils a fully autonomous long-running design verification agent that orchestrates the entire chip verification cycle delivering up to 50X faster time-to-validated RTL while achieving 20% additional coverage improvement
World's First Standards-Compliant 112G PHY IP for Linear Optics: A Turning Point for AI Interconnects
Synopsys delivers standards-compliant 112G PHY IP for linear optics, helping reduce AI interconnect power, latency, and heat.
Frequently asked questions about USB IP cores
What is SuperSpeed USB 3.1 Host Controller Multiport?
SuperSpeed USB 3.1 Host Controller Multiport is a USB IP core from Synopsys, Inc. listed on Semi IP Hub.
How should engineers evaluate this USB?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this USB IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.