CDM Dependence on Device Capacitance
This blog will focus on what happens during the CDM pulse itself, and will show how the pulse properties change as a function of DUT to Field Plate capacitance.
Vendor:
Certus Semiconductor
Category:
High-Speed
Multi-Standard Multi-Voltage Fail-Safe I/O in DB HiTek 110nm
A Specialized 1.2V to 3.3V Fail-Safe GPIO in Dongbu HiTek 110nm 11SB Pro- cess, with multiple protocol capabilties.
Overview
A Specialized 1.2V to 3.3V Fail-Safe GPIO in Dongbu HiTek 110nm 11SB Pro- cess, with multiple protocol capabilties.
This silicon-proven Wirebond compatible library in Dongbu HiTek 110nm features a multi-voltage, multi-standard General Purpose Input Output with an Open-Drain Input Output capability, that targets the I2C standard. The library is built as a Fail- Safe I/O design. There is no poly-orientation for this library. The library features an Analog Mux, which allows for core direct access to the bondpad, either to drive externally a signal or receive a signal from the PAD. The I/O Library is compliant with standards regarding all 1.2V, 1.8V, and 3.3V operation. The library can support various standards, including I3C, I2C, SPI and QSPI. ESD targets are 2kV HMB and 500V CDM.
Operating Conditions
| Parameter | Value |
| Devices | 3.3V Thick & 1.2V Thin Oxides |
| BEOL | 1P7M |
| VDDIO | 1.2V, 1.8V or 3.V |
| VDD | 1.2V |
| Temp | -40C to 125C |
| ESD | 2kV HBM & 500V CDM |
| I/O Cell Size | 100x200um |
| Bondpad | 70x70um |
Cell Summary
- DN_GPODIIC: An FS-GPIO/FS-ODIO with I2C targeted performance, and a broad selection of slew rate for the GPIO feature.
- DN_GPOD: An FS-GPIO/FS-ODIO designed for high-speed, hard driving applications. No slew rate features.
Key features
- Open-Drain Pull-up and Pull-down resistors
- Selectable Pull-up and Pull-down resistors
- Schmitt Trigger Input Reciever
- Selectable Drive Strengths (GPIO and ODIO modes)
- Selectable Slew Rates (GPIO and ODIO modes)
- Fail-Safe (I/O leaks zero current at pad when VDDIO is powered down)
- Analog Mux Feature
- Power-down control
- Wide Capacitive Load Range: 10pF to 75pF GPIO, 300pF ODIO
- Wide Slew Rate Select Ranges: 0.5pS to 100nS
Block Diagram
DN110 block diagram
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| DB HiTek | 110nm | SB | — |
Specifications
Identity
Part Number
DN110
Vendor
Certus Semiconductor
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
United States
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Frequently asked questions about High-Speed I/O Pad IP
What is Multi-Standard Multi-Voltage Fail-Safe I/O in DB HiTek 110nm?
Multi-Standard Multi-Voltage Fail-Safe I/O in DB HiTek 110nm is a High-Speed IP core from Certus Semiconductor listed on Semi IP Hub. It is listed with support for dbhitek.
How should engineers evaluate this High-Speed?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this High-Speed IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.