SpaceWire IP core
The SpaceWire IP core is compliant with the IEEE 1355 standard.
Overview
The SpaceWire IP core is compliant with the IEEE 1355 standard. It is capable of 100Mbps full duplex bitrate. Support for FreeRTOS, RTEMS and Linux is available, a TCP/IP networking driver is provided for Linux. This IP core comes in 2 different versions. The first one is presented to the processor as a peripheral (AXI/AHB), the second one is a "bare metal" implementation that can be connected to any HDL design without any processor involved or when maximum bitrate is needed.
Specifications
| EOP/EEP | Yes |
| Fifo depth | Configurable from 64 bytes to 16 kbytes |
| Time-codes | Yes |
| Wormhole addressing | No |
| Flow control | Yes |
| Full compliance with ECSS-E-ST-50-12C | Yes |
| Flight tested | Yes |
| RMAP support | Available (optional) |
This IP core comes in different versions:
- AXI/AXILite: Ready to connect to an AXI/AXI lite bus. It has an AXI lite slave for configuration and an AXI full interface to read/write data from memory
- AHB/APB: Same concept as AXI/AXILite configuration but with APB slave for configuration and AHB for writing memory
- AxiStream: Core to be integrated directly to an HDL project without any type of buses. With this configuration, the maximum bitrate can be achieved
Specifications
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Provider
Learn more about Spacewire IP core
Time Sensitive Networking for Aerospace
Frequently asked questions about SpaceWire IP cores
What is SpaceWire IP core?
SpaceWire IP core is a Spacewire IP core from Novo Space listed on Semi IP Hub.
How should engineers evaluate this Spacewire?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Spacewire IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.