Vendor: Xilinx, Inc. Category: Monitoring

Soft Error Mitigation (SEM) Core

Soft Error Mitigation (SEM) IP cores perform SEU detection, correction, and classification for configuration memory.

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Overview

Soft Error Mitigation (SEM) IP cores perform SEU detection, correction, and classification for configuration memory. The cores utilize device primitives such as ICAP and FRAME_ECC to clock and observe the Readback CRC feature as part of the SEU detection function. For SEU correction, the IP cores perform the necessary operations to locate and correct errors. For SEU classification, the IP cores use Xilinx Essential Bits technology to further increase system availability.

The SEM IP cores also perform emulation of SEUs by injecting errors into configuration memory. The error injection feature provides a means to evaluate and test the SEU mitigation capabilities of the IP cores without the need for expensive test time at a radiation effects facility.

Specifications

Identity

Part Number
Soft Error Mitigation (SEM) Core
Vendor
Xilinx, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Xilinx, Inc.
HQ: USA
Contact Xilinx, Inc.

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Frequently asked questions about system monitoring IP cores

What is Soft Error Mitigation (SEM) Core?

Soft Error Mitigation (SEM) Core is a Monitoring IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this Monitoring?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Monitoring IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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