Would custom memory ease your SoC design?
A case study shows how custom memory design can adapt to functional, timing, or layout requirements of a particular SoC.
Vendor:
Faraday Technology
Category:
SRAM
Single Port SRAM Compiler IP, UMC 0.25um Logic process
UMC 0.25um Logic process synchronous high speed Single Port SRAM memory compiler.
Overview
UMC 0.25um Logic process synchronous high speed Single Port SRAM memory compiler.
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| UMC | 250nm | 250nm 2500 nm | — |
Specifications
Identity
Part Number
FS90A_C_SU
Vendor
Faraday Technology
Type
Silicon IP
Provider
HQ:
Taiwan
Learn more about SRAM IP core
The Platform Based SOC Design that Utilizes Structured ASIC Technology
The Platform Based SOC Design that Utilizes Structured ASIC Technology
Timing Fragility Aware Selective Hardening of RISCV Soft Processors on SRAM Based FPGAs
This paper introduces a timing fragility aware selective hardening methodology for RISCV soft processors implemented on SRAM based FPGAs.
Novel Trade-offs in 5 nm FinFET SRAM Arrays at Extremely Low Temperatures
Why SRAM PUF Technology Is the Bedrock of Dependable Security in Any Chip
Vincent van der Leest, Synopsys
AI-driven SRAM demand needs integrated repair and security
Increasing popularity of AI applications and DPU architecture has led to growing demand for higher SRAM densities, in turn placing challenges on SRAM yield and reliability.
Frequently asked questions about SRAM IP cores
What is Single Port SRAM Compiler IP, UMC 0.25um Logic process?
Single Port SRAM Compiler IP, UMC 0.25um Logic process is a SRAM IP core from Faraday Technology listed on Semi IP Hub. It is listed with support for umc.
How should engineers evaluate this SRAM?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SRAM IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.