Timing Fragility Aware Selective Hardening of RISCV Soft Processors on SRAM Based FPGAs
This paper introduces a timing fragility aware selective hardening methodology for RISCV soft processors implemented on SRAM based FPGAs.
Vendor:
Spectral Design & Test Inc.
Category:
SRAM
Silicon-proven, High Density and Low Power Static Random Access Memories
Spectral MemoryIP™ is set of silicon-proven, High Density and Low Power Static Random Access Memories.
Overview
Spectral MemoryIP™ is set of silicon-proven, High Density and Low Power Static Random Access Memories. The library consists of the standard 5 compiler architectures: Single Port & Dual Port SRAMs, ROM, One and Two Port Register Files.
Spectral's solutions use foundry or Spectral custom designed bit cells that enable robust operation. They integrate high density, low power architectural design as well as performance optimized circuitry to attain high speed operation with minimal power consumption. Coupled with Spectral's Memory Development Platform, MemoryIP™ is also available in source code format so that users can modify the designs, port to other technologies or extend the capabilities. Spectral MemoryIP™ is designed for standard CMOS process technology.
Spectral's solutions use foundry or Spectral custom designed bit cells that enable robust operation. They integrate high density, low power architectural design as well as performance optimized circuitry to attain high speed operation with minimal power consumption. Coupled with Spectral's Memory Development Platform, MemoryIP™ is also available in source code format so that users can modify the designs, port to other technologies or extend the capabilities. Spectral MemoryIP™ is designed for standard CMOS process technology.
Key features
- High Density Design
- Advanced Compiler features supported
- Separate power rails for core & periphery
- Multiple aspect ratio options
- Multi-Bank architecture
- Low dynamic power consumption
- Complete set of integration views
- Available as Instance or Compiler
- Available in a generic process
Benefits
- MemoryIP™ can be used by foundries to provide a full set of superior foundation Memory libraries to its customers. It can also be used by fabless semiconductor companies that desire to internally develop and maintain control of the memory IP. For companies desiring to take control of memory IP development, MemoryIP™ provides a comprehensive set of 5 silicon proven architectures developed in the world's most productive memory compiler development platform, MemoryCanvas™ and MemoryTime™. Spectral offers optional rights to modify. The compilers included in the package all offer many compiler features such as power down, test modes, multiple aspect ratios, multi-bank and are fully compatible with advanced process nodes.
- MemoryIP™ from Spectral is compatible with, and can be used in place of, memories provided by commercial foundries or other IP vendor companies.
Applications
- Wireless, Metering devices, hearing aids, microcontroller, image processors, low power DSP processors.
Specifications
Identity
Part Number
MemoryIP
Vendor
Spectral Design & Test Inc.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
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Frequently asked questions about SRAM IP cores
What is Silicon-proven, High Density and Low Power Static Random Access Memories?
Silicon-proven, High Density and Low Power Static Random Access Memories is a SRAM IP core from Spectral Design & Test Inc. listed on Semi IP Hub.
How should engineers evaluate this SRAM?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SRAM IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.