High speed low latency AES-GCM pipeline, 100Gbps
The AES-IP-61 (EIP-61) is IP for accelerating AES-GCM based cryptographic solutions.
- AES
Cryptography IP cores provide hardware-based security functions for protecting data, communications, and digital assets in modern SoC and ASIC designs. By offloading cryptographic operations from software, these IP cores deliver higher performance, lower latency, improved energy efficiency, and stronger resistance to security attacks.
This category includes Symmetric Cryptography, Public Key Cryptography, Post-Quantum Cryptography (PQC), Hash / MAC, and Random Number Generator (RNG) IP solutions. Available implementations may support algorithms such as AES, ChaCha20, RSA, ECC, ML-KEM, ML-DSA, SHA-2, SHA-3, HMAC, CMAC, and true or deterministic random number generation technologies required for secure key management and authentication.
This catalog enables semiconductor engineers to evaluate and compare Cryptography IP from leading vendors based on supported algorithms, security certifications, throughput, latency, power consumption, silicon area, side-channel resistance, quantum-safe capabilities, and semiconductor process node compatibility.
High speed low latency AES-GCM pipeline, 100Gbps
The AES-IP-61 (EIP-61) is IP for accelerating AES-GCM based cryptographic solutions.
In-line Multi-Protocol Cipher Engine
The EIP-96 is an Inline Cryptographic Accelerator designed to accelerate and offload the very CPU intensive IPsec, MACsec, SRTP, …
LRW3 implements the NIST standard AES cipher in the LRW mode for encryption and decryption.
Implementation of the new encrypted shared storage media standard IEEE P1619 with AES cipher in the LRW mode.
Combo P1619 / 802.1ae (MACSec) GCM-AES/LRW-AES Cores
LAN security standard IEEE 802.1ae (MACSec) uses AES cipher in the GCM mode, while the disk/tape encryption standard IEEE P1619 u…
P1619/802.1ae (MACSec) GCM/XEX/XTS-AES Core
General Description LAN security standard IEEE 802.1ae (MACSec) uses AES cipher in the GCM mode, while the disk/tape encryption s…
Advanced Encryption Standard (AES-128) core with AMBA AHB interface
The GRAES core implements the AES-128 symmetric encryption algorithm for high-throughput applications.
Implementation of the older drafts standard IEEE P1619 required the NIST standard AES cipher in the LRW mode for encryption (AES-…
AES-GCM MACsec (IEEE 802.1AE) and FC-SP Cores
Implementation of the new LAN security standard 802.1ae (MACSec) requires the NIST standard AES cipher in the GCM mode for encryp…
AES-GCM, Extreme-Speed IP Cores for AES256-GCM Authenticated Encryption
XIP1113E is a family of extreme-speed IP cores designed for AES256-GCM ( Encryption Standard with a 256-bit key and Galois Counte…
AES-GCM Multi-channel upto 2Tbps Crypto Accelerator
The EIP-63, high speed AES-GCM engine is a scalable high-performance, multi-channel cryptographic engine that offers AES-GCM oper…
Duplex AES-GCM at 10Gbit/sec for OTN
This state of the art implementation of the AES-GCM algorithm provides privacy and authentication and achieves 10Gbit/sec perform…
AES-GCM - Authenticated Encryption and Decryption
Optimized for high processing throughput, suitable for designs that require increased performance while maintaining efficient use…
AES-GCM Authenticated Encryption and Decryption
Optimized for minimal logic and power usage, making it suitable for designs with stringent FPGA resource or energy constraints.
High-Performance AES-XTS Core with RAMBAM-Based SCA/FI Protection FortifyIQ’s AES-XTS IP core delivers high-throughput AES-128/25…
Ultra-High-Performance AES-GCM Core with RAMBAM-Based SCA/FI Protection FortifyIQ’s AES-GCM IP core delivers ultra-high-throughpu…
High-Performance AES-GCM/XTS Core with Integrated SCA/FI Protection FortifyIQ’s AES-GCM/XTS IP core delivers high-throughput encr…
Inline memory encryption engine for ASIC SoCs
The IME-IP-341 is an SoC-ready, in-line memory encryption engine using AES/SM4 ciphers with XTS/ECB/Bypass as modes of operation.
Deterministic Random Bit Generator (DRBG)
The Deterministic Random Bit Generator is an essential silicon-proven digital IP core for all FPGA, ASIC and SoC designs that tar…
IEC 61850/62351 Substation Automation Systems Cryptographic IP Core
IEC 61850/62351 Substation Automation Systems Cryptographic (SASCrypt) IP Core secures the strict real-time traffic used in the S…