Vendor:
Crypto Quantique
Category:
Post Quantum
IoT device security platform with a hybrid post-quantum cryptographic algorithm
QuarkLink™ makes it easy for developers to implement security-by-design for IoT devices.
Overview
QuarkLink™ makes it easy for developers to implement security-by-design for IoT devices. It streamlines on-device key generation/storage, key/certificate management (PKI/CLM), on-device security features (e.g. secure boot, flash encryption), and integrates into your team’s existing software development lifecycle (SDLC, CI/CD).
Key features
- Software development lifecycle integration (SDLC, CI/CD)
- Key and certificate management (PKI/CLM)
- On-device security features (e.g. secure boot, flash encryption)
- On-device key generation & storage
- Code signing & secure over-the-air updates (OTA)
- Onboarding to cloud services (e.g. IoT hubs, message brokers)
- Device lifecycle management
Block Diagram
QuarkLink block diagram
Specifications
Identity
Part Number
QuarkLink
Vendor
Crypto Quantique
Type
Silicon IP
Videos
Using QuarkLink to Connect a Renesas RA6M3 to the Cloud (AWS)
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
United Kingdom
Learn more about Post Quantum IP core
How to design secure SoCs Part IV: Runtime Integrity Protection
In previous articles, we gave an overview about secure SoC architectures (Part I), about the importance of key management (Part II) and secure boot (Part III) - the first line of defense. Part IV of the series focuses on runtime integrity protection, a paramount, ensuring the application remains secure even during active operation.
How to design secure SoCs Part IV: Runtime Integrity Protection
SoC designers are increasingly challenged to integrate robust security measures into their designs. Modern connected devices, such as automotive Electronic Control Units (ECUs), Internet of Things (IoT) nodes, and industrial control systems, face increasing susceptibility to cyberattacks. This escalating threat landscape underscores the critical importance of mandatory security requirements.
Nine Compelling Reasons Why Menta eFPGA Is Essential for Achieving True Crypto Agility in Your ASIC or SoC
Today’s world is already overly complicated to provide robust product security, with extremely motivated hackers creating novel threats exposing new vulnerabilities every day. But considering tomorrow’s world with the looming threat of quantum computing, expanding AI possibilities and rapidly evolving regional regulations and export control risk with severe financial penalties, this is a daunting challenge.
Providing protection against EMFI attacks
This Agile Analog blog post is focused on describing the dangers of Electromagnetic Fault Injection (EMFI) attacks and outlining the importance of EMFI sensors that are designed to provide protection.
Deploying StrongSwan on an Embedded FPGA Platform, IPsec/IKEv2 on Arty Z7 with PetaLinux and PQC
The objective of this article is to present and analyze a concrete IPsec/IKEv2 deployment on an FPGA-based embedded Linux system. Using an Arty Z7 FPGA platform with PetaLinux and StrongSwan, the focus is on system-level integration rather than protocol theory: how the IPsec stack is built and deployed, how classical and post-quantum key exchange are integrated without modifying standardized protocols, and what architectural trade-offs arise when moving cryptographic operations into programmable logic.
Frequently asked questions about Post-Quantum Cryptography IP cores
What is IoT device security platform with a hybrid post-quantum cryptographic algorithm?
IoT device security platform with a hybrid post-quantum cryptographic algorithm is a Post Quantum IP core from Crypto Quantique listed on Semi IP Hub.
How should engineers evaluate this Post Quantum?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Post Quantum IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.