Two-Digit Nanosecond PCIe 7.0-CXL 4.0 Link Controller IP
Two-Digit Nanosecond PCIe 7.0-CXL 4.0 Link Controller IP
Link Controller IP implements critical logics allowing your hardware to communicate over the CXL network. Our optimized architecture offers two-digit nanosecond roundtrip latency, providing significant performance gain in demanding workloads such as AI, HPC, and cloud.
Key Features
Our product in more details
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Specification |
PCIe 7.0/CXL 4.0 Backward compatible with CXL 3.2, 2.0, 1.1, and previous versions of PCIe |
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Number of Lanes |
Up to 16 |
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Data Rate |
128 GT/s |
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Roundtrip Latency |
< 100ns |
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Bifurcation Support |
x1, x2, x4, x8, x16 |
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Supported Sub-Protocols |
CXL.io, CXL.mem, CXL.cache Unordered IO support Back-invalidation support Direct P2P support |
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Supported Device Types |
CXL type 1/2/3 device support Multi-Logical Device (MLD) support Multi-Headed Device (MHD) support Fabric-Attached Memory (FAM) support |
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Flit Format |
68B, 256B, 256B standard, 256B LOpt support |
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Optimization Features |
Multi-Data Header (MDH) support Address Translation Service (ATS) support ARB/MUX bypass support Arbitration and data multiplexing/demultiplexing support |
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Latency Management |
Sync header bypass support Drift buffer support |
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Power Management |
Low-power mode support |
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Security Features |
Integrity and Data Encryption (IDE) feature support Advanced Error Reporting (AER) support |
IP Architecture
PCIe 7.0-CXL 4.0 Link Controller IP is composed of CXL controller and a PCIe controller, which handles CXL.cache/mem and CXL.io respectively. The IP allows configuration and status report through a set of registers. The IP can be connected to a user logic directly, or through the Link Acceleration Unit IP for faster time-to-market.
Silicon-Proven PCIe 7.0/CXL 4.0 Compliance
Ensure one-shot silicon success for your design and reduce time-to-market. Link Controller IP also offers full PCIe 7.0/CXL 4.0 feature support rigorously tested in multiple scenarios.
Configurable to Fit Your Need
Easily achieve your design goals. Link Controller IP offers diverse set of options you can configure for your memory expander, accelerator, and CPU design.
Best-In-Class Power Consumption
Save the power budget for your hardware design. Our precision architecture ensures the lowest power consumption for the controller IP.
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Link Controller IP is a CXL IP core from Panmnesia listed on Semi IP Hub.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CXL IP.
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.