Vendor: Zipcores Electronic Systems Engineering S.L. Category: NOR Flash

Parallel FLASH Memory Controller

FLASH_CONT is a JEDEC® compliant Flash controller IP Core that provides a convenient way of interfacing your FPGA or ASIC to an e…

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Overview

FLASH_CONT is a JEDEC® compliant Flash controller IP Core that provides a convenient way of interfacing your FPGA or ASIC to an external FLASH memory component. The IP Core features a simple-to use command interface and is fully synchronous with the system clock. The Flash controller is comprised of two main blocks. These blocks are the command FIFO and the main controller state machine that generates the correct signalling to the Flash memory.

The command FIFO uses the standard Zipcores valid-ready streaming protocol. This is a synchronous interface in which commands, addresses and data are written to the FIFO on the rising-edge of clk when flash_val and flash_rdy are both high1.

The command FIFO may be used to 'queue up' a sequence of commands to the Flash memory, and in doing so, can help to alleviate the speed differences between the system and the Flash device. The depth of the command FIFO may be configured with the generic parameters depth and log2d. Increasing the depth of the FIFO will allow more commands to be queued up. The 2-bit flash_cmd signal is decoded as follows:

  • 00 : Write byte command
  • 01 : Sector erase command
  • 10 : Chip erase command
  • 11 : Byte read command

The output ports to the Flash use a standard JEDEC pinout for an 8 or 16-bit EEPROM device. These pins may be connected directly to the external Flash memory component. The controller is compatible with most standard COTS devices such as those from Microchip®, Atmel®, AMD®, Winbond®, EON® and STmicroelectronics®.

Key features

  • Synthesizable, technology independent VHDL IP Core
  • 8-bit / 16-bit  Flash memory controller with synchronous user interface
  • Provides the physical interface between your FPGA / ASIC and the external Flash memory component
  • JEDEC® standard Flash EEPROM pinouts and commands
  • Configurable timing parameters to suit different Flash memory components
  • Configurable command FIFO compensates for System-to-Flash speed differences
  • Wide range of Flash memories supported
  • Vendors such as Microchip®, Atmel®, AMD®, EON® and STmicroelectronics®
  • Examples include the SST39*, AT49*, AM29*, EN29* and M29* series Flash memory ICs

Block Diagram

FLASH_CONT block diagram

Applications

  • Any application where non-volatile storage is required
  • Offline storage of parameters and data for FPGA / ASIC

Specifications

Identity

Part Number
FLASH_CONT
Vendor
Zipcores Electronic Systems Engineering S.L.
Type
Silicon IP
Controller / PHY
Controller

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact Zipcores Electronic Systems Engineering S.L.

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Frequently asked questions about NOR Flash Interface IP

What is Parallel FLASH Memory Controller?

Parallel FLASH Memory Controller is a NOR Flash IP core from Zipcores Electronic Systems Engineering S.L. listed on Semi IP Hub.

How should engineers evaluate this NOR Flash?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this NOR Flash IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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