Vendor: Arteris Category: System Controller

Magillem Packaging

An easy-to-use, scalable, and fully automated process to capture IP description in IP-XACT format Magillem® Packaging uses a data…

Overview

An easy-to-use, scalable, and fully automated process to capture IP description in IP-XACT format

Magillem® Packaging uses a data model based on the IP-XACT industry standard to handle all aspects of system integration for connectivity, configurability, and system memory map. It enables true IP reuse methodology with an interoperable design flow for complex SoCs, including register management, IP capture, and SoC IP assembly.

With a nonintrusive, scalable, and automatic process for legacy and new IP that enables seamless IP client portfolio packaging, Magillem Packaging delivers both data accuracy and flexibility. It allows incremental or full packaging with IP-XACT compliance and data consistency that are ensured by construction and assessed with a built-in Magillem IP-XACT checkers suite.

Key features

  • IP-XACT 2022 support​
  • HDL import: Verilog, SystemVerilog​
  • Static elaboration support (with resolved configurations)​
  • FileSet elaboration with full source file documentation​
  • Bus interface automatic mapping of physical ports​
  • Memory map intent capture​
  • Catalog management​
  • IP-XACT compliance checkers suite​

Block Diagram

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Benefits

Correct by construction IP-XACT description

Improved quality without requiring any prerequisite IP-XACT expertise.

True IP reuse methodology

Ideal for IP and subsystems with vendor-independent IP packaging (IP-XACT based).

Single source-of-truth environment for system design

Enables multipurpose usage and helps ensure data consistency for design tasks and teams.

Specifications

Identity

Part Number
Magillem Packaging
Vendor
Arteris
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Arteris
HQ: United States

Learn more about System Controller IP core

Facilitating Complex SoC Design Through Automation And Integration

The design demands of today’s highly advanced system-on-chip (SoC) devices have long outgrown the capabilities of manual workflows to manage them effectively. As these chips become more complex, only sophisticated, high-performance, and scalable automation can ensure that every component of the SoC functions seamlessly.

Arteris × XuanTie: The “Data Highway” for High-Performance RISC-V SoCs

On March 24, the 2026 XuanTie RISC-V Ecosystem Conference, hosted by Alibaba DAMO Academy, was held in Shanghai. Hundreds of industry and academic institutions from around the world—including Qualcomm, Arteris, Canonical, SHD Group, Haier, and ZTE—gathered to share cutting-edge practices in RISC-V.

Enabling Chiplet Design Through Automation and Integration Solutions

Chiplet-based, multi-die systems are gaining traction as a compelling alternative to monolithic system-on-chip (SoC) designs. These architectures are enabled by die-to-die (D2D) connectivity advances and driven by the need to overcome reticle limitations and improve yield. Designers can integrate homogeneous or heterogeneous functions, with each die implemented using the most appropriate process node for performance, power, and area. This disaggregation introduces new design challenges, including system-level integration, handling coherent and non-coherent traffic, and managing register address mapping across multiple dies.

Streamlining SoC Integration With the Power of Automation

The rapid acceleration of semiconductor technologies is creating system-on-chip (SoC) devices that are increasingly complex. These chips contain billions of transistors and hundreds of functional intellectual property (IP) blocks.

Arteris System IP Meets Arm Processor IP

The design of system-on-chip (SoC) devices for automotive applications—and the reuse of portions of those designs for future SoC incarnations—just got a lot easier with the recent announcement of the expanded partnership between Arm and Arteris.

Frequently asked questions about system controller IP cores

What is Magillem Packaging?

Magillem Packaging is a System Controller IP core from Arteris listed on Semi IP Hub.

How should engineers evaluate this System Controller?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this System Controller IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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