Vendor: Eureka Technology, Inc. Category: System Controller

Flash/ROM/SRAM Controller

Flash/ROM/SRAM Controller

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Key features

  • Supports industry standard Asynchronous SRAM, NOR Flash, ROM and similar memory devices.
  • Two request ports to allow two requesters to share access to the FLASH/ROM/SRAM devices.
  • 8 Chip select signals to access up to 8 memory banks.
  • Independent programmable timing parameters for each chip select.
  • Independent address mapping for each chip select.
  • Independent programmable data width of 8, 16 and 32 bits for each chip select.
  • Supports 32-bit and 64-bit user interface bus width.
  • Supports burst access from the request ports.
  • Automatic issues multiple access to memory device (byte collection) to match data word size of memory device with user interface data width.
  • Optional AHB user interface.
  • Optional ECC protection.
  • Optimzed for logic synthesis for ASIC and FPGA implementations.
  • Fully static design with edge triggered flip-flops.

Block Diagram

EP500 block diagram

Specifications

Identity

Part Number
EP500
Vendor
Eureka Technology, Inc.
Type
Silicon IP

Files

Product Sheet Download

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Provider

Contact Eureka Technology, Inc.

Learn more about System Controller IP core

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Frequently asked questions about system controller IP cores

What is Flash/ROM/SRAM Controller?

Flash/ROM/SRAM Controller is a System Controller IP core from Eureka Technology, Inc. listed on Semi IP Hub.

How should engineers evaluate this System Controller?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this System Controller IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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