Vendor: SmartDV Category: JESD204

JESD403 VIP

The SmartDV Verification IP (VIP) for JESD403 provides an efficient and simple way to verify the JESD403 bidirectional two-wire s…

Verification IP View all specifications

Overview

The SmartDV Verification IP (VIP) for JESD403 provides an efficient and simple way to verify the JESD403 bidirectional two-wire serial interface. The SmartDV VIP is fully compliant with version 1.0 specifications.

JESD403 VIP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

JESD403 VIP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Compliant with JESD403 version 1.0 specification.
  • Full JESD403 Host Controller and Device functionality.
  • Two wire serial interface up to 12.5 MHz.
  • Supports Dynamic Address Assignment including Static Addressing for legacy I2C Devices.
  • In-Band Interrupt support.
  • Support for all JESD403 Common Command Codes (CCC's).
  • 7-bit configurable Slave Address.
  • Supports HOST DEVICE ADDRESS.
  • Supports Timed reset.
  • Supports Write/Read formats.
  • Supports PEC enable/disable.
  • Master SCL clock stalling is supported.
  • Slave supports control of response fields including NACK, Data and Slave busy.
  • Supports slave error types S1 and S2.
  • Supports injection of various errors.
    • Master aborting in middle of access
    • Master doing ACK on last read access
  • Callbacks in Master, Slave and Monitor for user processing of data
  • Notifies the testbench of significant events such as transactions, warnings, timing and protocol violations.
  • Functional coverage of complete JESD403 specs.
  • JESD403 Verification IP comes with complete testsuite to test every feature of JESD403 specification.

Block Diagram

JESD403 VIP block diagram

Benefits

  • Faster testbench development and more complete verification of JESD403 designs.
  • Easy to use command interface simplifies testbench control and configuration of TX and RX.
  • Simplifies results analysis.
  • Runs in every major simulation environment.

What’s Included?

  • Complete regression suite containing all the JESD403 testcases to certify JESD403 Slave/Master device
  • Examples showing how to connect various components and usage of Master, Slave and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation also contains User's Guide and Release notes.

Specifications

Identity

Part Number
JESD403 VIP
Vendor
SmartDV
Type
Verification IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV
HQ: India

Learn more about JESD204 IP core

Keeping Pace with CXL Specification Revisions

As the Compute Express Link® (CXL®) specification rapidly evolves, so too must the tools and infrastructure used to verify designs built around it. Maintaining verification IP (VIP) that keeps pace with new specification revisions is no small task, particularly when dealing with major version shifts like the transition from CXL 2.0 to 3.0.

SmartDV Licenses SDIO IP Family to Ranix for V2X Products

To meet RANiX’s unique design goals, SmartDV will customize the IP to go beyond the standard SDIO functionality—thereby empowering RANiX to differentiate from their competitors. SmartDV will also provide RANiX with the requisite support and documentation to achieve ASIL certification for ISO 26262.

SmartDV Rolls Out Multi-Phase Expansion Plan

SmartDV™ Technologies, provider of flexible, customizable semiconductor design IP (intellectual property) and verification solutions, has expanded engineering operations beyond its headquarters in Bengaluru with the opening of a new office space in Coimbatore, Tamil Nadu, India.

Frequently asked questions about JESD204 IP cores

What is JESD403 VIP?

JESD403 VIP is a JESD204 IP core from SmartDV listed on Semi IP Hub.

How should engineers evaluate this JESD204?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this JESD204 IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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