PCI Express Phy IP

Compare 298 PCI Express Phy IP from 25 vendors (1 - 10)

PCIe Gen 6 Phy
- Architecture optimized for HPC, AI/ML, storage, and networking
- Ultra-long reach, low latency, and low power
- Advanced DSP delivers unmatched performance and reliability
- PCIe Gen 6 Phy IPPCIe Gen 6 Phy IPComprehensive real-time diagnostic, monitor, and test features
PCIe Gen2 PHY
- PCI Express Gen 2 and Gen 1 compliant
- Supports various PCI Express modes and extensions
- Programmable amplitude and pre-emphasis
- Programmable receiver equalization
PCIe Gen3 PHY
- Low Risk - Silicon proven with Si characterization data
- Excellent Interoperability
- Superior Noise Immunity
PCIe 6.0 / CXL 3.0 PHY & Controller
- Innosilicon’s PCIe 6.0 and CXL 3.0 IP solutions combine high-performance controllers and PHYs, fully compliant with PCIe 6.0, CXL 3.0, and PIPE specifications
- These solutions deliver exceptional performance, low latency, power efficiency, and unparalleled flexibility, making them ideal for enterprise computing, data centers, cloud servers, AI and machine learning, storage expansion, and high-speed interconnect applications
PCIe 5.0/4.0/3.0 PHY & Controller
- Innosilicon’s PCIe 5.0 IP solutions combine high-performance controllers and PHYs, fully compliant with PCIe 5.0/4.0/3.0, and PIPE specifications
- These solutions deliver exceptional performance, low latency, power efficiency, and unparalleled flexibility, making them ideal for enterprise computing, storage networks, automotive, and I/O connectivity applications
PCIe GEN6 PHY IP
- The PCIe GEN6 PHY IP achieves data rates up to 64GT/s per lane with PAM4 signaling thereby delivering reliable performance for high-speed data transfer.
- It supports advanced applications, including AI/ML, High-Performance Computing, and next-generation storage solutions.
PCIE 6.0/5.0/4.0/3.0/2.0
- Support PCI Expression Gen5 & Gen4 & Gen3 & Gen2 & Gen1
- Configurable differential voltage swing
- Embedded low jitter LC PLL with fixed bandwidth and output frequency
- PLL Frequency Lock detection
PCI Express Synthesizable Transactor
- Supports PCI Express specs 1.0/2.0/3.0/4.0/5.0/6.0.
- Supports MPCIE
- Supports PIPE, PCS/PMA, and serdes interface
- Supports MPHY RMMI and serial Interface
PHY for PCIe 6.0 and CXL
- Architecture optimized for HPC, AI/ML, storage, and networking
- Ultra-long reach, low latency, and low power
- Advanced DSP delivers unmatched performance and reliability
- Comprehensive real-time diagnostic, monitor, and test features
- Bifurcation support for x1, x2, x4, x8, and x16 lanes
PHY for PCIe 4.0 - Low-power, long-reach, multi-protocol PHY for PCIe 4.0
- Wide range of protocols that support networking, high-performance computing (HPC), and applications
- Low-latency, long-reach, and low-power modes
- Multi-Link PHY—mix protocols within the same macro
- EyeSurf —non-destructive on-chip oscilloscope
- User-friendly graphical interface provides easy access to embedded bit-error-rate (BER) and pattern testers and monitors to measure the link performance in real time