Multi-Channel HDTV H.264/AVC Limited Baseline Video Decoder
The OL_H264MCLD core is a hardware implementation of the H.264 baseline video compression algorithm.
- H.264 / AVC
Video Processing IP cores provide hardware-accelerated video encoding, decoding, transcoding, compression, decompression, scaling, and stream processing capabilities for modern SoC and ASIC designs.
This category includes IP solutions supporting major video and image compression standards such as AV1, AV2, H.264/AVC, H.265/HEVC, H.266/VVC, VP8, VP9, MPEG-2, MPEG-4, MPEG-5 LCEVC, JPEG, and JPEG 2000. These IP cores enable efficient video delivery, storage, streaming, analytics, and multimedia processing across a wide range of semiconductor applications.
This catalog allows semiconductor engineers to evaluate and compare Video Processing IP from leading vendors based on codec support, encoding and decoding performance, video quality, resolution capability, throughput, latency, silicon area, power efficiency, and process node compatibility.
Multi-Channel HDTV H.264/AVC Limited Baseline Video Decoder
The OL_H264MCLD core is a hardware implementation of the H.264 baseline video compression algorithm.
HDTV H.264/AVC Limited Baseline Video Decoder
The OL_H264LD core is a hardware implementation of the H.264 baseline video compression algorithm.
H.265/HEVC 422 10bit Decoder for 4K
Support up to 4K60fps processing
H.265/HEVC 422 10bit Encoder for 4K
Support up to 4K60fps processing
Our Video Encoder IP Core is a real-time, true multi-format hardware encoder IP supporting H.264/AVC, H.265/HEVC, VP9 video codec…
Legacy formats decoder up to 1920X1080@60FPS
The AL-D105 is a multi-format, multi-stream, video decoder IP core, capable of decoding 12 different video formats up to H.264/AV…