UMC IP Cores

UMC 28nm HLP/ Low-K Two Port Register File compiler.

• UMC
• 28nm
• HLP

UMC 0.25um Logic process synchronous low density Low Power Two Port (1R1W) SRAM memory compiler.

• UMC
• 250nm

UMC 0.25um Logic process synchronous Two Port Register File compiler.

• UMC
• 250nm

UMC 0.18um GII Logic process synchronous Two Port (1R1W) Register File SRAM memory compiler.

• UMC
• 180nm
• G

UMC 0.13um LL Logic/FSG process high density synchronous Two Port Register File SRAM memory compiler.

• UMC
• 130nm
• LL

UMC 0.13um Logic HS FSG Synchronous high density Low Power Two Port Register File SRAM memory compiler.

• UMC
• 130nm
• HS

UMC 0.13um HS/FSG Logic process Synchronous Two Port Register File SRAM memory compiler.

• UMC
• 130nm
• HS

UMC 0.13um HS/LL fusion (FSG) process high density synchronous Two Port Register File SRAM memory compiler.

• UMC
• 130nm
• HS

UMC 0.11um Logic(LL) FSG process synchronous Two Port Register File memory compiler.

• UMC
• 110nm
• LL

UMC 0.11um HS Logic process synchronous Two Port Register File SRAM memory compiler.

• UMC
• 110nm
• HS

UMC 0.11um HS/AE (AL Enhancement) Logic process synchronous Two Port Register File memory compiler.

• UMC
• 110nm
• HS

UMC 0.11um eFlash HS process, Two Port Register File.

• UMC
• 110nm

UMC 55nm SP/RVT Low-K Logic process Powerlash Core Cell Library.

• UMC
• 55nm
• SP

UMC 28nm HPC/RVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library (C35).

• UMC
• 28nm
• HPC

UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library with LPLUS (C38).

• UMC
• 28nm
• HLP

UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library with LMINUS (C30 RVT).

• UMC
• 28nm
• HLP

UMC 28nm HLP/LVT Logic process 9-Track POWERSLASH standard Core Cell Library (C35).

• UMC
• 28nm
• HLP

UMC 28nm HPC/LVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library (C35).

• UMC
• 28nm
• HPC

UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track POWERSLASH Generic Core Cell Library wtih LPLUS (C38).

• UMC
• 28nm
• HLP

UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library with LMINUS (C30).

• UMC
• 28nm
• HLP