UMC IP Cores

UMC 55nm SP/RVT LowK Logic Process True 3.3V Low Frequency OSC IO Cell Library

• UMC
• 55nm
• SP

UMC 90nm LL/RVT Low-K Logic Process 2.5VOD3.3V Low Frequency OSC pad

• UMC
• 90nm
• LL

UMC 90nm LL/RVT Low-K Logic Process 2.5VOD3.3V Low Frequency OSC BOAC Pad

• UMC
• 90nm
• LL

UMC 0.25um LOGIC process standard Multi-Voltage IO

• UMC
• 250nm

UMC 28nm Logic and Mixed-Mode HPC Processs Multi-Voltage BOAC SD3.0 I/O Cell library

• UMC
• 28nm

UMC 40nm LP/RVT Logic Process 1.8V/2.5V/3.3V multi-voltage generic POC BOAC I/O cell library

• UMC
• 40nm
• LP

UMC 40nm LP/RVT Logic Process 1.8V/3.0V multi-voltage BOAC eMMC I/O cell library

• UMC
• 40nm
• LP
• Pre-Silicon

UMC 65nm LL/RVT 1P10M LowK Logic Process 1.8V/3.3V multi-voltage generic I/O cell library

• UMC
• 65nm
• LL

UMC 0.13um HS/FSG Logic Process Ultra-slim SSTL-2 (ClassI)/LVTTL (10mA) Combo I/O Cells

• UMC
• 130nm
• HS

UMC 0.11um HS/AL Logic Process True 3.3V Standard IO Cell Library

• UMC
• 110nm
• HS

UMC 55nm SP/RVT LowK Logic Process True 3.3V Generic IO Cell Library

• UMC
• 55nm
• SP

UMC 0.18um Logic GII Process true 3.3V RTC IO cell Library

• UMC
• 180nm
• BCD
• Pre-Silicon

UMC 28nm Logic and Mixed-Mode HPC Process 3.3V Analog ESD IO cell Library

• UMC
• 28nm

UMC 28nm Logic and Mixed-Mode HPC Process, 1.8V Analog ESD IO cell Library

• UMC
• 28nm

UMC 28nm Logic and Mixed-Mode HPC Process,0.9V Analog ESD IO cell Library

• UMC
• 28nm

Analog part of 600Mbps to 4Gbps 8-lane V-By-One transmitter with embedded PLL circuit, VCC=0.9V; UMC 28nm HPC+ LowK Logic Process.

• UMC
• 28nm
• HPC+

28nm HPC+ USB3.1 gen2 PHY(10Gbps)

• USB 3.1
• UMC
• 28nm
• HPC+

28nm HPC USB3.1 gen2 PHY(10Gbps)

• USB 3.1
• UMC
• 28nm
• HPC

USB 3.0 PHY; UMC 28nm HPC_Plus +RVT+LVT Logic Process

• USB 3.0
• UMC
• 28nm
• HPC

USB 2.0 On-The-Go PHY; UMC 40nm Logic LP/RVT Low-K Process

• USB 2.0
• UMC
• 40nm