UMC 40nm LP/HVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm LP/HVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
- UMC
- 40nm
- LP
UMC 40nm LP/HVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm LP/HVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with with LPLUS (C38 RVT)
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track generic core cell library
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track generic core cell library
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with LMINUS (C31 RVT)
UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with with LPLUS (C38 LVT)
UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library
UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library
UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with LMINUS (C31 LVT)
UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with with LPLUS (C38 HVT)
UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track generic core cell library
UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track generic core cell library
UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with LMINUS (C31 HVT)
UMC 40nm uLP/RVT Logic Process SYNS-like 7T GENERIC CORE Cell Library
UMC 40nm uLP/RVT Logic Process SYNS-like 7T GENERIC CORE Cell Library
UMC 40nm uLP/LVT Logic Process SYNS-like 7T GENERIC CORE Cell Library
UMC 40nm uLP/LVT Logic Process SYNS-like 7T GENERIC CORE Cell Library
UMC 40nm uLP/HVT Logic Process SYNS-like 7T GENERIC CORE Cell Library
UMC 40nm uLP/HVT Logic Process SYNS-like 7T GENERIC CORE Cell Library
UMC 28nm HPM/LVT Logic Process 12-track generic_core library with LPKUS (C38)
UMC 28nm HPM/LVT Logic Process 12-track generic_core library with LPKUS (C38)
UMC 28nm HPM/LVT Logic Process 12-track generic cell library with LMINUS (C-31)
UMC 28nm HPM/LVT Logic Process 12-track generic cell library with LMINUS (C-31)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)
UMC 0.18um GII Logic Process 3.3V core cell library
UMC 0.18um GII Logic Process 3.3V core cell library
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)