General Purpose Multi-Voltage IO IP, BOAC (Bonding Over Active Circuit), UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG process Multi-Voltage mini BOAC IO Cell Library.
General Purpose Multi-Voltage IO IP, BOAC (Bonding Over Active Circuit), UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process BOAC Multi-Voltage IO.
Specialty PCI IO IP, BOAC (Bonding Over Active Circuit), UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG process PCIX IO for BOAC.
Specialty OSC IO IP, BOAC (Bonding Over Active Circuit), UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process 3.3V Low frequency OSC IO with POC (Pad On Circuit).
Specialty OSC IO IP, BOAC (Bonding Over Active Circuit), UMC 0.13um HS/FSG process
UMC 0.13um 1.2V HS/FSG Logic process 3.3V OSC IO with POC (Pad On Circuit).
Specialty PECL IO IP, BOAC (Bonding Over Active Circuit), UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process 3.3V PECL IO with POC (Pad On Circuit).
General Purpose IO IP, BOAC (Bonding Over Active Circuit), UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG process 50VT Generic IO for BOAC.
General Purpose Multi-Voltage IO IP, 1.8V/2.5V/3.3V Operations, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG process, Multi-Voltage Mini-IO.
Specialty SSTL IO IP, BOAC (Bonding Over Active Circuit), UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process SSTL2 (ClassI) mini BOAC IO Cells.
Specialty SSTL IO IP, BOAC (Bonding Over Active Circuit), UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic Library (core) 1.8V MDDR IO with POC (Pad On Circuit).
10/100 Ethernet PHY IP, UMC 65nm SP process
10/100 Base-TX Fast Ethernet PHY, UMC 65nm SP/RVT Low-K Logic process.
10/100 Ethernet PHY IP, Energy Efficient, UMC 0.11um HS/AE process
10/100 Base-TX/FX Energy Efficient Ethernet PHY, UMC 0.11um HS/AE (AL Advance Enhancement) Logic process.
Standard Cell (Ultra High Speed) Library IP, RVT, 12 tracks, UMC 65nm LP process
UMC 65nm LP/RVT Low-K Logic process UHS (Ultra high speed) Cell Library.
Standard Cell (Ultra High Speed) Library IP, HVT, 12 tracks, UMC 65nm SP process
UMC 65nm SP/HVT Low-K Logic process high speed Cell Library.
Standard Cell (Ultra High Speed) Library IP, RVT, 12 tracks, UMC 55nm SP process
UMC 55nm SP/RVT Low-K process high speed Core Cell Library.
Standard Cell (MiniLib) Library IP, RVT, 8 tracks, UMC 65nm LL process
UMC 65nm LL/RVT Low-K process Mini-Library Generic Core Cell Library.
Standard Cell (MiniLib) Library IP, HVT, 8 tracks, UMC 65nm LL process
UMC 65nm LL-HVT Low-K process Mini-Library Generic Core Cell Library.
Standard Cell (MiniLib) Library IP, RVT, 8 tracks, UMC 65nm SP process
UMC 65nm SP/RVT process Core Cell Library mini Library.
Standard Cell (MiniLib) Library IP, RVT, 8 tracks, UMC 55nm SP process
UMC 55nm SP/RVT Low-K Logic process Mini-Library Core Cell Library.
Standard Cell (MiniLib) Library IP, HVT, 8 tracks, UMC 55nm SP process
UMC 55nm SP/HVT Low-K process Mini-Library Generic Core Cell Library.