UMC IP Cores

UMC, 0.13um HS/FSG Logic process SSTL(2.5V) & SSTL18 (1.8V) combo IO.

• UMC
• 130nm
• HS

UMC 0.11um HS/AL process Mini-IO for Multi-Voltage Cell Library.

• UMC
• 110nm
• HS

UMC 0.13um HS/FSG Logic process Multi-Voltage IO.

• UMC
• 130nm
• HS

UMC 90nm LL/RVT Low-K process with 2.5V device Analog esd IO group.

• UMC
• 90nm
• LL

UMC 90nm SP/RVT Low-K process 2.5V over-drive 3.3V GOX52 process IO (BOAC).

• UMC
• 90nm
• SP

UMC 90nm SP/RVT process true 3.3V standard IO (using 3.3V gate oxide).

• UMC
• 90nm
• SP

UMC 90nm SP process 3.3V Analog ESD IO set ( using 3.3V gate oxide).

• UMC
• 90nm
• SP

UMC 90nm LL/RVT process true 3.3V standard IO (using 3.3V gate oxide).

• UMC
• 90nm
• LL

UMC 90nm LL/RVT Low-K Logic process Multi-Voltage Generic IO cell using 3.3V GOX52 IO.

• UMC
• 90nm
• LL

UMC 90nm SP/RVT Logic Low-K process 2.5V OD 3.3V high frequency OSC Pad.

• UMC
• 90nm
• SP

UMC 65nm SP/RVT Low-K Logic process 1.8V/3.3V Multi-Voltage Generic BOAC IO Cell Library.

• UMC
• 65nm

UMC 65nm SP/RVT Low-K Logic process 2.5VOD3.3V PCI-X BOAC IO Cell Library.

• UMC
• 65nm

UMC 55nm SP/RVT Low-K Logic process Multi-Voltage floating N-well BOAC IO Cell Library.

• UMC
• 55nm
• SP

UMC 0.18um LL Logic process 3.3/2.5/1.8 Multi-Voltage IO with POC (Pad On Circuit).

• UMC
• 180nm
• LL

UMC 0.18um LL Logic process 3.3V Generic IO with POC (Pad On Circuit).

• UMC
• 180nm
• LL

UMC 0.18um LL Logic process 3.3V AnalogESD IO with POC (Pad On Circuit).

• UMC
• 180nm
• LL

UMC 0.18um LL Logic process 1.8V Generic IO with POC (Pad On Circuit).

• UMC
• 180nm
• LL

UMC 0.18um LL Logic process 1.8V AnalogESD IO with POC (Pad On Circuit).

• UMC
• 180nm
• LL

UMC 0.18um LL Logic process 3.3V with 5V tolerance IO with POC (Pad On Circuit).

• UMC
• 180nm
• LL

UMC 0.18um GII Logic process 2.5V/3.3V SSTL2 Class II/LVTTL combo IO with POC (Pad On Circuit).

• UMC
• 180nm
• G