One Port Register File Compiler IP, UMC 0.11um LL/AE process
UMC 0.11um LL/AE (AL Enhancement) Logic process 1.41um2 cell Single Port Register File (One Port Register File) memory compiler.
One Port Register File Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um AE eFlash HS process for One Port Register File compiler.
One Port Register File Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Enhancement) Logic process 1.41um2 cell One Port Register File memory compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 90nm CIS process
Single Port SRAM, UMC 90nm CMOS Image Sensor Image Sensor process.
Single Port SRAM Compiler IP, UMC 90nm CIS process
UMC 90nm CMOS Image Sensor process 1P3M Single Port SRAM compiler.
Single Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm LL Low-K RVT process synchronous Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 80nm HV process
UMC 80nm HV process Single Port SRAM memory compiler with Redundancy.
Single Port SRAM Compiler IP, UMC 80nm HV process
UMC 80nm HV process Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm SP process
UMC 55SP Single Port SRAM with row redundancy.
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Synchronous Single Port SRAM using 0.425-Bit cell memory compiler.
Single Port SRAM Compiler IP, UMC 55nm eHV process
UMC 55nm HV Single Port SRAM with peripheral LVT.
Single Port SRAM Compiler IP, UMC 55nm eHV process
UMC 55 eHV process Single Port SRAM compiler.
Single Port SRAM Compiler IP, HVT, Support Repair Features, UMC 55nm CIS process
UMC 55nm CMOS Image Sensor Single Port SRAM with peripheral HVT and row redundancy.
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm eFlash with peripheral HVT Single Port SRAM compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm LP process
UMC 55nm LP Low-K Logic process Synchronous Single Port SRAM memory compiler with redundancy feature.
Single Port SRAM Compiler IP, UMC 55nm LP process
UMC 55nm LP Low-K Logic process Synchronous Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm eHV process
UMC 55nm eHV Low Power Low-K process synchronous high density, Single Port SRAM compiler with row redundancy option.
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm eHV process
UMC 55 eHV process Single Port SRAM memory compiler with row Redundancy.
Single Port SRAM Compiler IP, UMC 55nm CIS process
UMC 55nm CMOS Image Sensor 1P3M process Single Port SRAM memory compiler with peripheral HVT.
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP 303RVT cell peripheral LVT.