USB 3.0 OTG PHY IP, UMC 0.11um HS/FSG process
USB3.0 PHY, UMC 0.11um HS/FSG (Cu) Logic process.
- USB 3.0
- UMC
- 110nm
- HS
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
USB 3.0 OTG PHY IP, UMC 0.11um HS/FSG process
USB3.0 PHY, UMC 0.11um HS/FSG (Cu) Logic process.
USB 3.0 OTG PHY IP, UMC 0.11um HS/AE process
USB3.0 PHY, UMC 0.11um HS/AE Logic process.
USB 2.0 OTG PHY IP, UMC 90nm LL process
USB2.0 OTG PHY, UMC 90nm LL Low-K -RVT process 2.5V OD 3.3V.
USB 2.0 OTG PHY IP, UMC 90nm SP process
USB2.0 OTG PHY, UMC 90nm SP/RVT/ Low-K process.
USB 2.0 OTG PHY IP, UMC 65nm LP process
USB2.0 OTG PHY (VDT and ID are included in PHY), UMC 65nm LP/RVT Low-K Logic process.
USB 2.0 OTG PHY IP, UMC 65nm LL process
USB2.0 OTG PHY (VDT and ID are included in PHY), UMC 65nm low leakage RVT Low-K process.
USB 2.0 OTG PHY IP, UMC 65nm SP process
USB2.0 OTG (VDT and ID are included in PHY), UMC 65nm SP/HVT Low-K process.
USB 2.0 OTG PHY IP, UMC 55nm SP process
OTG USB 2.0 PHY (VDT and ID are included in PHY), UMC 55nm SP Low-K Logic process.
USB 2.0 Device PHY IP, UMC 0.18um CIS process
USB2.0 PHY, UMC 0.18um CMOS Image Sensor process.
USB 2.0 OTG PHY IP, UMC 0.18um eFlash/G2 process
USB2.0 OTG PHY, UMC 0.18um eFlash process.
USB 2.0 Device PHY IP, UMC 0.18um G2 process
USB2.0 PHY, UMC 0.18um GII Logic process.
USB 2.0 OTG PHY IP, UMC 0.18um eFlash/G2 process
USB2.0 OTG PHY, UMC 0.18um E-flash process.
USB 2.0 Device PHY IP, UMC 0.13um CIS process
USB 2.0 PHY, UMC 0.13um CMOS Image Sensor process.
USB 2.0 Device PHY IP, UMC 0.11um LL/FSG process
USB 2.0 PHY, UMC 0.11um LL Logic process.
USB 2.0 Device PHY IP, UMC 0.11um HS/FSG process
USB 2.0 PHY, UMC 0.11um HS Logic process.
USB 2.0 Device PHY IP, UMC 0.11um HS/AE process
USB 2.0 PHY, UMC 0.11um HS/AE standard Logic process.
USB 2.0 OTG PHY IP, OTG, UMC 0.11um HS/FSG process
USB 2.0 On-The-Go PHY, UMC 0.11um HS/FSG Logic process.
USB 2.0 OTG PHY IP, OTG, UMC 0.11um HS/AE process
USB 2.0 OTG PHY, UMC 0.11um HS AL Logic process.
USB 2.0 OTG PHY IP, UMC 0.11um HS/AE process
USB 2.0 OTG PHY, UMC 0.11um HS/AE (AL Advance Enhancement) Logic process.
USB 1.1.OTG PHY IP, UMC 90nm LL process
USB1.1 PHY feature USB 1.1 Type PHY, Technology Type process USB 1.1 On-The-Go PHY, UMC 90nm LL Logic process.