Dual Port SRAM Compiler IP, Support Repair Features, UMC 55nm eHV process
UMC 55nm eHV process, Dual Port SRAM compiler with row redundancy option.
- UMC
- 55nm
SRAM IP cores provide reusable on-chip storage structures for processors, controllers, and accelerators in modern SoC and ASIC designs.
These IP cores support fast on-chip volatile storage for caches, buffers, and tightly coupled memories, helping designers balance density, speed, power, and reliability in memory-centric subsystems
This catalog allows you to compare SRAM IP cores from leading vendors based on density, performance, power efficiency, and process node compatibility.
Whether you are designing processors, accelerators, embedded SoCs, or high-speed control systems, you can find the right SRAM IP for your application.
Dual Port SRAM Compiler IP, Support Repair Features, UMC 55nm eHV process
UMC 55nm eHV process, Dual Port SRAM compiler with row redundancy option.
Dual Port SRAM Compiler IP, High density, (2RW), UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process high density synchronous Dual Port (2RW) SRAM memory compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 90nm CIS process
Single Port SRAM, UMC 90nm CMOS Image Sensor Image Sensor process.
Single Port SRAM Compiler IP, UMC 90nm CIS process
UMC 90nm CMOS Image Sensor process 1P3M Single Port SRAM compiler.
Single Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm LL Low-K RVT process synchronous Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 80nm HV process
UMC 80nm HV process Single Port SRAM memory compiler with Redundancy.
Single Port SRAM Compiler IP, UMC 80nm HV process
UMC 80nm HV process Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm SP process
UMC 55SP Single Port SRAM with row redundancy.
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Synchronous Single Port SRAM using 0.425-Bit cell memory compiler.
Single Port SRAM Compiler IP, UMC 55nm eHV process
UMC 55nm HV Single Port SRAM with peripheral LVT.
Single Port SRAM Compiler IP, UMC 55nm eHV process
UMC 55 eHV process Single Port SRAM compiler.
Single Port SRAM Compiler IP, HVT, Support Repair Features, UMC 55nm CIS process
UMC 55nm CMOS Image Sensor Single Port SRAM with peripheral HVT and row redundancy.
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm eFlash with peripheral HVT Single Port SRAM compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm LP process
UMC 55nm LP Low-K Logic process Synchronous Single Port SRAM memory compiler with redundancy feature.
Single Port SRAM Compiler IP, UMC 55nm LP process
UMC 55nm LP Low-K Logic process Synchronous Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm eHV process
UMC 55nm eHV Low Power Low-K process synchronous high density, Single Port SRAM compiler with row redundancy option.
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm eHV process
UMC 55 eHV process Single Port SRAM memory compiler with row Redundancy.
Single Port SRAM Compiler IP, UMC 55nm CIS process
UMC 55nm CMOS Image Sensor 1P3M process Single Port SRAM memory compiler with peripheral HVT.
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP 303RVT cell peripheral LVT.
Single Port SRAM Compiler IP, Support Repair Features, UMC 40nm LP process
UMC 40nm LP Logic process Single Port SRAM compiler LVT with row redundancy.