Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP process synchronous high density Single Port SRAM memory compiler.
- UMC
- 28nm
- HLP
SRAM IP cores provide reusable on-chip storage structures for processors, controllers, and accelerators in modern SoC and ASIC designs.
These IP cores support fast on-chip volatile storage for caches, buffers, and tightly coupled memories, helping designers balance density, speed, power, and reliability in memory-centric subsystems
This catalog allows you to compare SRAM IP cores from leading vendors based on density, performance, power efficiency, and process node compatibility.
Whether you are designing processors, accelerators, embedded SoCs, or high-speed control systems, you can find the right SRAM IP for your application.
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP process synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP process LVT synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP Logic process LVT synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP process standard LVT synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP Logic process LVT synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP process synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 28nm HLP process
high density Single Port SRAM, UMC 28nm HLP process.
Single Port SRAM Compiler IP, UMC 0.25um SP process
UMC 0.25um Logic process synchronous high speed Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous Single Port Low Power SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous low density Low Power Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.25um process
UMC 0.25um Logic process standard asynchronous low density Low Power Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, 4.0um2 bit cells, High density, Low Power, UMC 0.18um G2 process
UMC 0.18um GII Logic process synchronous high density, Low Power mini Single Port SRAM.
Single Port SRAM Compiler IP, UMC 0.13um SP process
UMC 0.13um HS/FSG Logic process synchronousultra high speed Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.13um LL process
UMC 0.13um LL Logic/FSG process high density synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG standard process synchronous high density Low Power Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.11um SP process
UMC 0.11um eFlash SP process, Single Port SRAM compiler.
Single Port SRAM Compiler IP, UMC 0.11um LL process
UMC 0.11um low leakage process Synchronous high density Single Port SRAM compiler.