Foundation Library IP cores provide the fundamental building blocks required for ASIC and SoC implementation, enabling efficient digital design, physical synthesis, timing closure, and manufacturing across advanced semiconductor process nodes.
This category includes both Standard Cell Libraries and I/O Pad Libraries, covering logic cells, sequential elements, low-power cells, level shifters, ESD-protected I/O interfaces, and process-specific implementation libraries optimized for leading foundries.
This catalog enables semiconductor engineers to evaluate and compare Foundation Library IP solutions from multiple vendors based on process node support, PPA (Power, Performance, Area) characteristics, library characterization quality, voltage domains, reliability requirements, and integration with modern EDA design flows.
Whether targeting AI accelerators, automotive SoCs, networking devices, wireless chipsets, or high-performance computing applications, engineers can identify the Foundation Library IP best suited to their technology, performance, and manufacturing requirements.
9 track Near Threshold Voltage standard cell library at TSMC 55 nm
TSMC 55 uLPeF, SESAME NTV, an extreme low voltage library designed to operate down to the minimum data retention voltage allowing…
6 track Ultra High Density standard cell library at TSMC 180 nm
TSMC 180 BCD, SESAME uHD for ultra high-density logic design thanks to 6-track cells combined with pulsed latch cells acting as s…
Standard Cell Library in TSMC (12nm~180nm)
M31 provides a variety of cell libraries, including Ultra-High Density Standard Cell Library (HDSC), General Purpose Standard Cel…
General Purpose I/O (GPIO) in TSMC(12nm,16nm,22nm, 28nm, 40nm, 90nm BCD+, 152nm BCD, 180nm BCD)
GPIO is a general-purpose input/output unit that provides basic input/output functionalities.
The RF libraries include analog signal pads and ESD protection components for RF applications.
The ONFI library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage referen…
2.5V 5V Tolerant GPIO Inline IO Pad Set
The 3.3V General Purpose I/O (5VT) library provides programmable bidirectional I/O’s that are both 5V tolerant and fault tolerant.
2.5V 5V Tolerant GPIO Staggered IO Pad Set
The 3.3V General Purpose I/O (5VT) library provides programmable bidirectional I/O’s that are both 5V tolerant and fault tolerant.
The LVDS I/O is a three-module design (input, output and reference block).
The LVDS I/O is a three-module design (input, output and reference block).
The SSTL_15/18 pad set is a full complement of I/O, calibration, power, and spacer cells that are necessary to assemble a padring…
1.8V General Purpose Staggered I/O Pad Set
The 1.8V GPIO library provides general purpose bidirectional I/O cells.
3.3V Wide-Range General Purpose Inline I/O Pad Set
The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along …
1.8V General Purpose I/O Staggered Pad Set
The 1.8V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along …
3.3V General Purpose I/O Inline Pad Set
The 3.3V GPIO library provides general purpose bidirectional I/O cells.
3.3V General Purpose I/O Staggered Pad Set
The 3.3V GPIO library provides general purpose bidirectional I/O cells.
3.3V Fault Tolerant General Purpose I/O Inline Pad Set
The 3.3V GPIO FT library provides general purpose bidirectional I/O cells that are fault tolerant.
3.3V Fault Tolerant General Purpose I/O Staggered Pad Set
The 3.3V GPIO FT library provides general purpose bidirectional I/O cells that are fault tolerant.
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers ope…
1.8V General Purpose I/O Staggered Pad Set
The 1.8V GPIO FT library provides ultra low leakage general purpose bidirectional I/O cells.