IO pad library IP provides the physical interface between internal core logic and external chip pins. These libraries are critical for signal integrity, ESD robustness, voltage domain interoperability, manufacturability, and reliable chip-level integration across semiconductor products.
Explore IO pad IP libraries including GPIO, analog pads, high-speed pads, and protection structures tailored to foundry process requirements.
General Purpose IO IP, 5V tolerance, UMC 0.153um LL process
UMC 0.153um Mixed-Mode/Logic 3.3V IO Logic process 5V Tolerant Standard IO Cell Library (blown up version of 0.18um IO).
DDR IO Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X…
VeriSilicon UMC 0.18μm CF I/O
VeriSilicon UMC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for UMC 0.18μm 1.8v/3.3v 1P6M Generic II lo…
Specialty Analog ESD IO IP, UMC 0.153um LL process
UMC 0.153um Mixed-Mode/Logic process 3.3V Analog ESD IO Cell Library.
Specialty OSC IO IP, UMC 0.153um MS process
UMC 0.153um Mixed-Mode/Logic process 1.8V device high frequency crystal osc IO Library.
Specialty Analog ESD IO IP, UMC 0.153um LL process
UMC 0.153um Mixed-Mode/Logic process 3.3V Analog ESD IO Cell Library.
Specialty OSC IO IP, UMC 0.153um MS process
UMC 0.153um Mixed-Mode/Logic process 1.8V device low frequency crystal osc IO Library.
Specialty OSC IO IP, UMC 0.153um MS process
UMC 0.153um Mixed-Mode/Logic process 1.8V device high frequency crystal osc IO Library.
Specialty Analog ESD IO IP, UMC 0.153um LL process
UMC 0.153um Mixed-Mode/Logic process 1.8V Analog ESD io Cell Library.
General Purpose IO IP, 1.8V/2.5V/3.3V Operations, UMC 0.153um MS process
UMC 0.153um Mixed-Mode/Logic process mini IO (blown up version of 0.18u Mini-IO).
General Purpose IO IP, BOAC (Bonding Over Active Circuit), UMC 0.162um G2 process
UMC 0.162um GII Logic process true 3.3V standard BOAC IO Cell Library (0.18um shrink process).
General Purpose IO IP, BOAC (Bonding Over Active Circuit), UMC 0.162um G2 process
UMC 0.162um GII Logic process True 1.8V IO cells.
I/O - I/O pad library with circuit under pad
IP
Specialty OSC IO IP, UMC 0.162um G2 process
UMC 0.162um GII Logic process high frequency OSC crystal Pad.
General Purpose IO IP, 5V tolerance, UMC 0.162um G2 process
UMC 0.162um GII Logic process 5V tolerant Generic IO.
General Purpose IO IP, UMC 0.162um G2 process
UMC 0.162um GII Logic process true 3.3V standard IO Cell Library (0.18um shrink process).