UMC 65nm SP LowK Logic Process synchronous single port register file SRAM memory compiler.
UMC 65nm SP LowK Logic Process synchronous single port register file SRAM memory compiler.
- UMC
- 65nm
Embedded memory IP cores are fundamental components in modern SoC and ASIC designs, providing fast and efficient on-chip data storage for processors, accelerators, and peripherals.
These IP cores encompass a broad range of volatile and non-volatile memory technologies, including SRAM for high-speed data storage, ROM for fixed program and boot code storage, register files for processor and accelerator architectures, as well as EEPROM, eFuse/OTP, and MTP (Multiple-Time Programmable) memories for configuration data, security credentials, device calibration, and permanent system information.
This catalog allows you to compare embedded memory IP cores from leading vendors based on density, access time, power consumption, and process node compatibility.
Whether you are designing high-performance processors, AI accelerators, automotive systems, or IoT devices, you can find the right embedded memory IP for your design.
UMC 65nm SP LowK Logic Process synchronous single port register file SRAM memory compiler.
UMC 65nm SP LowK Logic Process synchronous single port register file SRAM memory compiler.
UMC 90nm SPLVT ultra-high speed 1-port SRAM
UMC 90nm SPLVT ultra-high speed 1-port SRAM
UMC 0.13um Al Standard performance process standard synchronous high density dual port SRAM compiler
UMC 0.13um Al Standard performance process standard synchronous high density dual port SRAM compiler
UMC 0.18UM Mixed Mode/RF; Two Port Register File
UMC 0.18UM Mixed Mode/RF; Two Port Register File
UMC 0.18UM Mixed Mode/RF; One Port Register File Memory Compiler
UMC 0.18UM Mixed Mode/RF; One Port Register File Memory Compiler
VeriSilicon SMSB 0.18um Ultra-Low-Leakage(ULL) Process Synchronous Memory Compiler optimized for Silterra Malaysia Semiconductor …
UMC 0.5um Logic process standard asynchronous VIA2 programmed ROM memory compiler.
UMC 0.5um Logic process standard asynchronous VIA2 programmed ROM memory compiler.
UMC 80nm LL/eHV Process synchronous Via ROM memory compiler
UMC 80nm LL/eHV Process synchronous Via ROM memory compiler
UMC 0.45um Logic process standard gate array asynchronous metal programmed ROM memory compiler.
UMC 0.45um Logic process standard gate array asynchronous metal programmed ROM memory compiler.
UMC 0.5um Logic process standard synchronous diffusion programmed ROM memory compiler.
UMC 0.5um Logic process standard synchronous diffusion programmed ROM memory compiler.
UMC 55nm Logic process standard synchronous Contact ROM memory compiler.
UMC 55nm Logic process standard synchronous Contact ROM memory compiler.
UMC 55nm Logic process standard synchronous Contact ROM memory compiler.
UMC 55nm Logic process standard synchronous Contact ROM memory compiler.
UMC 40nm LP Logic Process TCAM with LVT peripheral memory compiler
UMC 40nm LP Logic Process TCAM with LVT peripheral memory compiler
UMC 28nm HPC Process dual port SRAM with power gating
UMC 28nm HPC Process dual port SRAM with power gating
UMC 28nm HPC process PG Dual Port SRAM with LVT
UMC 28nm HPC process PG Dual Port SRAM with LVT
UMC 28nm HPC process PG-Dual Port SRAM with LVT
UMC 28nm HPC process PG-Dual Port SRAM with LVT
UMC 28nm HPC process Dual Port SRAM with Power gating
UMC 28nm HPC process Dual Port SRAM with Power gating
UMC 40NM Low-K Low Power synchronous Feature Dual Port SRAM memory compiler
UMC 40NM Low-K Low Power synchronous Feature Dual Port SRAM memory compiler
UMC 55nm Standard Performance LowK Logic Process Two-Port Register File
UMC 55nm Standard Performance LowK Logic Process Two-Port Register File
UMC 40nm LP Logic Process Two-Port Register File with LVT Peripheral Memory Compiler
UMC 40nm LP Logic Process Two-Port Register File with LVT Peripheral Memory Compiler