UMC 55nm ULP Low-K process, Single-Port SRAM with Row repair & periphery HVT
UMC 55nm ULP Low-K process, Single-Port SRAM with Row repair & periphery HVT
- UMC
- 55nm
- ULP
- Pre-Silicon
Embedded memory IP cores are fundamental components in modern SoC and ASIC designs, providing fast and efficient on-chip data storage for processors, accelerators, and peripherals.
These IP cores encompass a broad range of volatile and non-volatile memory technologies, including SRAM for high-speed data storage, ROM for fixed program and boot code storage, register files for processor and accelerator architectures, as well as EEPROM, eFuse/OTP, and MTP (Multiple-Time Programmable) memories for configuration data, security credentials, device calibration, and permanent system information.
This catalog allows you to compare embedded memory IP cores from leading vendors based on density, access time, power consumption, and process node compatibility.
Whether you are designing high-performance processors, AI accelerators, automotive systems, or IoT devices, you can find the right embedded memory IP for your design.
UMC 55nm ULP Low-K process, Single-Port SRAM with Row repair & periphery HVT
UMC 55nm ULP Low-K process, Single-Port SRAM with Row repair & periphery HVT
UMC 55nm ULP process , Single-Port SRAM with row repair and HVT
UMC 55nm ULP process , Single-Port SRAM with row repair and HVT
UMC 55nm ULP/LowK process Single-Port SRAM
UMC 55nm ULP/LowK process Single-Port SRAM
UMC 55nm ULP-SST process standard synchronous high density single port SRAM memory compiler.
UMC 55nm ULP-SST process standard synchronous high density single port SRAM memory compiler.
UMC 55nm ULP-SST process standard synchronous high density single port SRAM memory compiler.
UMC 55nm ULP-SST process standard synchronous high density single port SRAM memory compiler.
UMC 40nm LP process synchronous high density (0.213LPHVT cell) single port SRAM compiler with row redundancy.
28nm HPM SP-SRAM with Row and 2 Column Repair
28nm HPM SP-SRAM with Row and 2 Column Repair
28nm HPM SP-SRAM with row and 1 column repair
28nm HPM SP-SRAM with row and 1 column repair
UMC 28nm HPM process synchronous LVT preiphery high density single port SRAM memory compiler with Row and 2 Column Repair
28nm HPM SP-SRAM with peri LVT & row & 1 column repair
28nm HPM SP-SRAM with peri LVT & row & 1 column repair
28nm HPM SP-SRAM with peri LVT & 2 column repair
28nm HPM SP-SRAM with peri LVT & 2 column repair
28nm HPM SP-SRAM with peri-LVT 1 column repair
28nm HPM SP-SRAM with peri-LVT 1 column repair
28nm HPM SP-SRAM with 2 column redundancy
28nm HPM SP-SRAM with 2 column redundancy
28nm HPM SP-SRAM with 1 column redundancy
28nm HPM SP-SRAM with 1 column redundancy
UMC 28nm HPC process standard synchronous LVT periphery high density single port low power SRAM memory compiler with row redundan…
UMC 28nm HPC process standard synchronous HVT periphery high density single port low power SRAM memory compiler with row redundan…
UMC 28nm HPC Logic Process Ultra High Density Single-Port SRAM Memory Compiler
UMC 28nm HPC Logic Process Ultra High Density Single-Port SRAM Memory Compiler
UMC 55nm ULP-SST process PG One Port Register File for periphery HVT
UMC 55nm ULP-SST process PG One Port Register File for periphery HVT
CSMC 0.18um Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Via1 ROM Compiler
VeriSilicon CSMC 0.18um High-Speed Synchronous Memory Compiler optimized for CSMC TECHNOLOGIES CORPORATION Fab2 0.18um MS/RF proc…
VeriSilicon CSMC 0.16um High-Speed Synchronous Memory Compiler optimized for CSMC TECHNOLOGIES CORPORATION Fab2 0.16um MS/RF proc…