Tensilica FloatingPoint KQ7/KQ8 DSPs
Super-high-performance DSPs specifically optimized for floating-point workload with exceptional PPA Cadence® Tensilica® FloatingP…
- DSP Core
- Available on request
Compute and acceleration IP cores are specialized hardware blocks designed to improve performance and efficiency in modern SoC and ASIC designs.
This category covers a diverse ecosystem of processing technologies, including CPU and microcontroller cores for embedded control and software execution, AI/ML accelerators for neural network processing, DSP and math engines for real-time signal processing, data compression accelerators for efficient storage and communications, and eFPGA fabrics that provide post-silicon flexibility and hardware reconfigurability.
Whether you are designing for edge AI, automotive systems, consumer electronics, or data center acceleration, you can identify the right IP to optimize your system performance.
Tensilica FloatingPoint KQ7/KQ8 DSPs
Super-high-performance DSPs specifically optimized for floating-point workload with exceptional PPA Cadence® Tensilica® FloatingP…
Tensilica FloatingPoint KP1/KP6 DSPs
High-performance DSPs designed for floating-point-centric processing with ultra-low energy and small area Cadence® Tensilica® Flo…
2X the performance of the HiFi 3 DSP for DSP-intensive applications like multi-channel, digital assistant front-end processing, a…
Akida is a neural processor platform inspired by the cognitive ability and efficiency of the human brain.
DVB-T2 Demodulator and LDPC/ BCH Decoder
The demodulator is designed to be used together with an RF tuner, and an analog to digital converter.
ZSP5000H is a programmable Vector Digital Signal Processor Core targeted for high performance Computer Vision and Image processin…
ZSP5000UL is a programmable Vector Digital Signal Processor Core for high performance computer vision and image processing applic…
ZSP5000 is a programmable Vector Digital Signal Processor Core for high performance computer vision and image processing applicat…
ZSPNano+ is a small, energy efficient, Digital Signal Processor Core for high performance Voice/Audio/Wireless applications.
CCSDS AR4JA LDPC Encoder and Decoder with code rates 1/2, 2/3, 4/5 and block sizes 1K, 4K, 16K
The IPrium-LDPC-CCSDS-AR4JA-Encoder-Decoder IP Core implements Low Density Parity Check (LDPC) forward error correction algorithm…
IEEE 802.11n/ac/ax Encoder and Decoder
The IPrium-LDPC-802.11-WIFI-Encoder-Decoder IP Core implements Low Density Parity Check (LDPC) forward error correction algorithm…
CCSDS 131.2 SCCC Turbo Encoder and 64-APSK Modulator
The IPrium-CCSDS-SCCC-Modulator-Encoder IP Core implements the CCSDS modulation standard 131.2-B.
CCSDS SCCC Modulator/ Turbo Encoder
CCSDS SCCC Modulator/ Turbo Encoder
Roviero has developed a natively graph computing processor for edge inference.
The Rad Hard eFPGA IP cores leverage the proven Australis eFPGA generation flow to deliver customizable, radiation-tolerant solut…
DVB-RCS2 Turbo Decoder and Encoder
On the transmitter side, the turbo-phi encoder architecture is based on a parallel concatenation of two double-binary Recursive S…
The Synopsys ARC® VPX DSP Family is optimized for the unique power, performance and area (PPA) requirements of embedded workloads…
1:6 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp.
1:4 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp.
1:3 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp.