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Vendor:
IPrium LLC
Category:
Channel Coding
CCSDS AR4JA LDPC Encoder and Decoder with code rates 1/2, 2/3, 4/5 and block sizes 1K, 4K, 16K
The IPrium-LDPC-CCSDS-AR4JA-Encoder-Decoder IP Core implements Low Density Parity Check (LDPC) forward error correction algorithm…
Overview
The IPrium-LDPC-CCSDS-AR4JA-Encoder-Decoder IP Core implements Low Density Parity Check (LDPC) forward error correction algorithm for AR4JA CCSDS 131.0-B-4 TM synchronization and channel coding standard.
Key features
- Fully synchronous design, using single clock
- Fully synthesizable drop-in module for FPGAs
- Optimized for high performance and low resources
- Low implementation loss
- Fully verified and real-time tested on a FPGA based development platform
- Considerations for easy ASIC integration
- Validated on IPrium Evaluation Boards
What’s Included?
- VQM/NGC/EDIF netlists for Intel (Altera) Quartus Prime, Xilinx Vivado/ISE, Lattice Diamond or Microsemi (Actel) Libero SoC
- IP Core testbench scripts
- Design examples for Intel (Altera), Xilinx, Lattice, and Microsemi (Actel) evaluation boards
- Free 1 year warranty and support period
Specifications
Identity
Part Number
IPrium-LDPC-CCSDS-AR4JA-Encoder-Decoder
Vendor
IPrium LLC
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Italy
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Frequently asked questions about Channel Coding IP cores
What is CCSDS AR4JA LDPC Encoder and Decoder with code rates 1/2, 2/3, 4/5 and block sizes 1K, 4K, 16K?
CCSDS AR4JA LDPC Encoder and Decoder with code rates 1/2, 2/3, 4/5 and block sizes 1K, 4K, 16K is a Channel Coding IP core from IPrium LLC listed on Semi IP Hub.
How should engineers evaluate this Channel Coding?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.