Bayer to RGB Converter

BAYER_TO_RGB is a fully pipelined Bayer-mapped to RGB converter IP Core. The IP Core may be used to process the raw pixels from an image sensor or Colour Filter Array (CFA). These pixels are typically organized as a bayer pattern of discrete Red, Green and Blue values which must be interpolated to recover the original image - a process that is commonly known as de-mosaicing.

Internally, the circuit uses a 5 x 5 pixel filter with dynamic coefficients to interpolate the pixels from the CFA. The resulting output is a high-quality RGB image at 24-bits/pixel.

Bayer-mapped pixels flow into the design in accordance with the valid ready pipeline protocol2. Input pixels and syncs are sampled on the rising edge of clk when pixin_val and pixin_rdy are both high. Likewise, at the output interface, pixels and syncs are sampled on a the rising edge of clk when pixout_val and pixout_rdy are both high.

The image size is fully programmable with standard support for anything from 16x16 pixels and above. The width of the input pixels is specified using the generic parameter dw. Output pixels are standard 24-bit RGB.

• Technology independent soft IP Core for FPGA, ASIC and SoC devices
• Supplied as human-readable VHDL (or Verilog) source code
• Fully pipelined architecture with simple flow control and AXI4 compatible data streaming interfaces
• Decoding of a bayer-mapped image from an image sensor or Colour Filter Array (CFA)
• Supports all image resolutions from 16 x 16 pixels up to 216 x 216
• Support for all sensor pixel widths from 2-bits and above
• Support for different CFA sensor alignments
• Features a 5 x 5 polyphase interpolation filter
• Output 1 x 24-bit pixel per clock
• No frame buffer required
• Small implementation size
• Support for 300 MHz+ operation on basic FPGA and SoC devices

• Bayer-mapped to 24-bit RGB decoding (de-mosaicing)
• Digital camera image processing
• Forms an essential first stage in most digital processing pipelines that contain an image sensor