Overview
USB is a generic interface in the modern days to connect to various high speed data peripherals. Many USB device/client controllers are introduced in the embedded systems market, which enables interfacing a host microcontroller to quickly and easily connect to a USB host such as a PC or industrial PC. One of the major limitations on these controllers is the bottle neck on data rate imposed by the interface between the host microcontroller and the USB device controller which more often is a serial UART interface, SPI interface, JTAG interface, or FIFO interface. In FPGA based embedded systems with reconfiguration capability, it is desirable to implement this USB controller on-chip and thus implement an SoC.
Learn more about USB IP core
Post Covid 19, the biggest bet for revival of the industry is on 5G proliferation across the world. It is widely expected that 5Gâs Enhanced Mobile broadband (eMMB) with speeds as high as 20X of 4G speed, Ultra reliable and Low Latency Communication ( URLLC) and massive Machine type connectivity (mMTC) will transform the world.
In addition to performance and interoperability, achieving low power has been one of the requirements for industry standards specifications. Some of the key specifications like Universal Serial Bus (USB), PCI Express (PCIe), and MIPI have defined power saving features for burst traffic. This whitepaper explains how Synopsys USB IP offers low power using various low power states that go beyond the basic features.
Gervais Fong, Synopsys
