Vendor: SmartDV Category: ARINC 429

ARINC 419 Synthesizable Transactor

ARINC 419 Synthesizable Transactor provides an smart way to verify the ARINC 419 component of a SOC or a ASIC in Emulator or FPGA…

Overview

ARINC 419 Synthesizable Transactor provides an smart way to verify the ARINC 419 component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's ARINC 419 Synthesizable Transactor is fully compliant with standard ARINC 419 Specification and provides the following features.

Key features

  • Supports ARINC REPORT 419 - 3
  • Supports 32 bit words containing a 24 bit data portion containing the actual information, and an 8 bit label describing the data itself
  • Supports transmission rates at 11 ± 3.5 kbps
  • Supports bipolar Return-to-Zero encoding format
  • Supports following data types
    • Binary – BNR – Transmitted in fractional two’s complement notation
    • Binary Coded Decimal – BCD – Numerical subset of ISO Alphabet No. 5
    • Maintenance Data and Acknowledgement - Requires two-way communication
  • Supports duplex or two-way communication in Maintenance Data and acknowledgement between source and sink
  • Supports all types of error insertion/detections as given below:
    • Parity Errors
    • Word count errors
    • Synchronization errors
    • Invalid label Errors
  • Supports FIFO depth programmable

Block Diagram

ARINC 419 Transactor block diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesizable transactors
  • Complete regression suite containing all the ARINC 419 testcases
  • Examples showing how to connect and usage of Synthesizable Transactor
  • Detailed documentation of all DPI, class, task and functions used in verification env
  • Documentation also contains User's Guide and Release notes

Specifications

Identity

Part Number
ARINC 419 Transactor
Vendor
SmartDV
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV
HQ: India

Learn more about ARINC 429 IP core

Keeping Pace with CXL Specification Revisions

As the Compute Express Link® (CXL®) specification rapidly evolves, so too must the tools and infrastructure used to verify designs built around it. Maintaining verification IP (VIP) that keeps pace with new specification revisions is no small task, particularly when dealing with major version shifts like the transition from CXL 2.0 to 3.0.

SmartDV Licenses SDIO IP Family to Ranix for V2X Products

To meet RANiX’s unique design goals, SmartDV will customize the IP to go beyond the standard SDIO functionality—thereby empowering RANiX to differentiate from their competitors. SmartDV will also provide RANiX with the requisite support and documentation to achieve ASIL certification for ISO 26262.

SmartDV Rolls Out Multi-Phase Expansion Plan

SmartDV™ Technologies, provider of flexible, customizable semiconductor design IP (intellectual property) and verification solutions, has expanded engineering operations beyond its headquarters in Bengaluru with the opening of a new office space in Coimbatore, Tamil Nadu, India.

Frequently asked questions about ARINC-429 IP cores

What is ARINC 419 Synthesizable Transactor?

ARINC 419 Synthesizable Transactor is a ARINC 429 IP core from SmartDV listed on Semi IP Hub.

How should engineers evaluate this ARINC 429?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ARINC 429 IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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