Learn more about I2C / I3C IP core
The I2C (Inter-Integrated Circuit) Bus invented in 1980 by Philips Semiconductors (NXP Semiconductors today) was a massive step forward in simplifying communications in embedded systems. It is a simple two-wire interface for synchronous, multi-master/multi-slave, single ended serial communication. Fast forward 45 years to today and it is still widely used for attaching low speed peripheral Integrated Circuits (ICs), processors and microcontrollers. But silicon today has changed...
Based on the MIPI I3C, CHIPS Alliance, part of Linux Foundation, introduced an open source I3C Core. The Core is already used in the likewise CHIPS-hosted Caliptra Root-of-Trust project and the SoC reference design Guineveer based on the VeeR EL2 RISC-V core.
Early in my career selling chips for Motorola Semiconductor, the ability to spin derivative microcontroller chips for a customer’s specific requirement was relatively straightforward. If the volume looked reasonable, we would tape-out a new chip with a few added features because mask costs and wafers were relatively inexpensive at the larger process nodes. The customer won by getting an MCU tailored to their specific need, and Motorola won by gaining a more committed customer plus another SKU that could be sold to other customers – boosting ROI. With the migration to higher cost FinFET nodes, those times are long gone as the economics no longer work.
Sharmion Kerley, MIPI Director of Marketing and Membership
Imagine a camera subsystem that responds in microseconds, consumes less power, and offers a more straightforward route to time-to-market. For SoC architects and IP integration teams, that vision is increasingly possible with MIPI Camera Control Interface (CCI) over I3C.
