IP Set for Miniaturized Telehealth Wearables
HealthIP™ is targeting portable health monitoring (telehealth/telemedicine) and wearable health monitoring devices.
- Mixed Signal Subsystem
- Silicon proven
- Now
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
IP Set for Miniaturized Telehealth Wearables
HealthIP™ is targeting portable health monitoring (telehealth/telemedicine) and wearable health monitoring devices.
PMU IP includes following components: Bandgap reference voltage source, reference current sources and reference frequency generat…
Linear Li-Ion Battery Charger - ±1% Accuracy (4.2V) / Up to 1.1A Fast Charge SilTerra 0.18um
This USB/AC Li-Ion battery charger is targeted for portable applications.
Ultra-low power and high performance 12bit 1Msps SARADC
Supports 1Ksps~2Msps sampling rate; 8-channel differential inputs or 20-channel single-ended inputs; High performance: ENOB>=11.0…
Ultra-low power and high performance 12bit SARADC (2.7V~3.6V)
Supports 1Ksps~4Msps sampling rate; 4-channel differential inputs or 8-channel single-ended inputs; High performance: ENOB>=11.0b…
5.0V/3.3V-->3.3V/1.5V capacitor-free regulator
Supports capacitor-less application with fast transient; Typical output 1.50V, output range is from 1.40V to 1.65V; 200mA driving…
14-bit, 50 MSPS Ultra Low Power ADC in 28nm CMOS
The ODT-ADP-14B50M-28 is a low power high speed pipelined ADC designed in a 28nm standard CMOS process with an optional input buf…
Dual WideBand Frequency Synthesizer with Integrated VCO and Loop Filter
CorePLL is a wideband phase-locked loop (PLL) system for 2G (GSM) 3G and 4G (LTE), including Carrier Aggregation (CA) for 3GPP Re…
10-bit 1-channel 2.6 kSPS SAR ADC
IP 250iHP_ADC_09 is 10-bit 2.6 kSPS ADC employs high-performance single ended successive approximation architecture with embedded…
GF L40LP 40nm Clock Generator PLL - 75MHz-375MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L40LP 40nm Clock Generator PLL - 150MHz-750MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L40LP 40nm Clock Generator PLL - 300MHz-1500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CL016G 160nm Clock Generator PLL - 65MHz-325MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CL016G 160nm Clock Generator PLL - 130MHz-650MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CL016G 160nm Clock Generator PLL - 260MHz-1300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN16FF+GL 16nm Clock Generator PLL - 200MHz-1000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN16FF+GL 16nm Clock Generator PLL - 400MHz-2000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN16FF+GL 16nm Clock Generator PLL - 800MHz-4000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN16FF+LL 16nm Clock Generator PLL - 200MHz-1000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN16FF+LL 16nm Clock Generator PLL - 400MHz-2000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.