Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process
Vrr=0.8V Vfr=0.65V, VCC=1.2V, Ivcc=12.7uA, HS process with A-type IO., Power On Reset, UMC 0.13um HS/FSG Logic process.
- UMC
- 130nm
- HS
Power management IP cores are essential components in modern SoC and ASIC designs, enabling efficient power regulation, distribution, and energy optimization.
These IP cores include functions such as voltage regulators, DC-DC converters, LDOs, battery management, and power monitoring, ensuring reliable and energy-efficient system operation.
This catalog allows you to compare power management IP cores from leading vendors based on efficiency, power consumption, integration level, and process node compatibility.
Whether you are designing mobile devices, automotive systems, IoT products, or high-performance computing platforms, you can find the right power management IP for your system.
Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process
Vrr=0.8V Vfr=0.65V, VCC=1.2V, Ivcc=12.7uA, HS process with A-type IO., Power On Reset, UMC 0.13um HS/FSG Logic process.
Power on Reset IP, Input: 1.1V, UMC 40nm LP process
Vrr=0.8V, Vfr=0.65V, input VCC=1.1V, 1.1V Power On Reset, UMC 40nm LP/RVT Low-K Logic process.
Power on Reset IP, Input: 1.0V, UMC 90nm SP process
Vrr=0.67V Vfr=0.63V, input 1.0V, Core type, Power On Reset (with Self-Test Circuit), UMC 90nm SP/RVT Logic Low-K process.
Linear Regulator IP, UMC 90nm SP process
3.3V to 1.0V/100mA REG, Linear Regulator, UMC 90nm SP/RVT Low-K Logic process.
Linear Regulator IP, UMC 90nm SP process
2.5V to 1.2V/100mA REG, Linear Regulator, UMC 90nm SP/RVT Low-K Logic process.
Linear Regulator IP, UMC 40nm LP process
3.3V to 1.1V/100mA REG, Linear Regulator, UMC 40nm LP/RVT Low-K Logic process.
Linear Regulator IP, UMC 40nm LP process
1.8V and 1.2V input, loading 360mA, 1.1V output with VBG=0.88V Regulator with BYPASS mode, UMC 40nm LP/RVT Low-K Logic process.
Linear Regulator IP, UMC 40nm LP process
3.3V to 1.8V with 150mA driving capability, Linear Regulator, UMC 40nm LP/RVT Low-K Logic process.
Linear Regulator IP, UMC 0.13um HS/FSG process
USB 2.0 Two Port PHY, UMC 0.13um HS/FSG Logic process.
Linear Regulator IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process 3.3V to 1.2V with 100mA driving capability, Linear Regulator with Capacitor-Free.
Linear Regulator IP, Output: 3.3V/70mA, UMC 0.25um process
3.3V with 70mA driving capability, Istb=75uA Linear Regulator, 0.25um Logic process.
Linear Regulator IP, Output: 3.3V/250mA, UMC 0.25um process
3.3V with 250mA driving capability, Istb=85uA Linear Regulator, UMC 0.25um Logic process.
Linear Regulator IP, Output: 3.3V/150mA, UMC 0.25um process
3.3V with 150mA driving capability, Istb=75uA Linear Regulator, 0.25um Logic process.
Linear Regulator IP, Input: 4.0V-5.5V, Output: 3.3V / 250mA, 1.8V / 70mA, UMC 0.18um G2 process
5V with 250mA driving capability, Istb=120uA Linear Regulator, UMC 0.18um GII Logic process.
Linear Regulator IP, Input: 2.0V-4.0V, Output: 1.8V / 100mA, UMC 0.18um G2 process
3.3V with 100mA driving capability, Istb=100uA Linear Regulator, 0.18um GII Logic process.
5V with 250mA driving capability, Istb=120uA Linear Regulator, UMC 0.18um GII Logic process.
3.3V with 150mA driving capability, Istb=96uA Linear Regulator, UMC 0.18um GII Logic process.
Linear Regulator IP, Input: 1.65V-3.6V, Output: 1.8V / 60mA, UMC 0.18um G2 process
3.3V with 60mA driving capability, Istb=85uA Linear Regulator, UMC 0.18um GII Logic process.
Linear Regulator IP, Input: 1.65V-3.6V, Output: 1.8V / 240mA, UMC 0.18um G2 process
3.3V with 240mA driving capability, Istb=uA Linear Regulator, UMC 0.18um LL Logic process.
PWM controller with soft start function for DC to DC boost converter, UMC 0.13um HS/FSG Logic process.