What is 512bit EEPROM IP with configuration 16p2w16bit?
512bit EEPROM IP with configuration 16p2w16bit is a EEPROM IP core from NTLab listed on Semi IP Hub. It is listed with support for smic Pre-Silicon.
180SMIC_EEPROM_09 is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 512 bits which is org…
180SMIC_EEPROM_09 is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 512 bits which is organized as 16 pages of 2 words by 16 bit with single-bit output data and parallel write data. Data writing in EEPROM consists of 2 phases - erasing and programming. Data to be written in EEPROM are applied to din1<15:0>, din0<15:0> inputs. Erasing words of a page is performed by setting to “1” the signal hv_on, with the signal erase is at state “1”. Data din1<15:0>, din0<15:0>, page address adr_p<3:0> and word address in page adr_w must not be changed throughout the whole cycle of erasing (i.e. while hv_on = “1”). Words are programmed when the signal hv_on= “1” and the signal PROG= “1”. Data reading is performed using the sample signal. Memory is optimized for usage in the industrial and commercial applications, requiring low power consumption and supply voltage.
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| SMIC | 180nm | G | Pre-Silicon |
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512bit EEPROM IP with configuration 16p2w16bit is a EEPROM IP core from NTLab listed on Semi IP Hub. It is listed with support for smic Pre-Silicon.
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